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| 型號(hào)： | SN54LVT8980JT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, CDIP24 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-24 |
| 文件頁數(shù)： | 1/36頁 |
| 文件大?。?/td> | 509K |
| 代理商： | SN54LVT8980JT |
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SN54LVT8980, SN74LVT8980
EMBEDDED TEST-BUS CONTROLLERS
IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES
SCBS676D – DECEMBER 1996 – REVISED AUGUST 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Members of Texas Instruments (TI) Broad
Family of Testability Products Supporting
IEEE Std 1149.1-1990 (JTAG) Test Access
Port (TAP) and Boundary-Scan Architecture
D Provide Built-In Access to IEEE Std 1149.1
Scan-Accessible Test/Maintenance
Facilities at Board and System Levels
D While Powered at 3.3 V, the TAP Interface is
Fully 5-V Tolerant for Mastering Both 5-V
and/or 3.3-V IEEE Std 1149.1 Targets
D Simple Interface to Low-Cost 3.3-V
Microprocessors/Microcontrollers Via 8-Bit
Asynchronous Read/Write Data Bus
D Easy Programming Via Scan-Level
Command Set and Smart TAP Control
D Transparently Generate Protocols to
Support Multidrop TAP Configurations
Using TI’s Addressable Scan Port
D Flexible TCK Generator Provides
Programmable Division, Gated-TCK, and
Free-Running-TCK Modes
D Discrete TAP Control Mode Supports
Arbitrary TMS/TDI Sequences for
Non-Compliant Targets
D Programmable 32-Bit Test Cycle Counter
Allows Virtually Unlimited Scan/Test Length
D Accommodate Target Retiming (Pipeline)
Delays of Up to 15 TCK Cycles
D Test Output Enable (TOE) Allows for
External Control of TAP Signals
D High-Drive Outputs (–32-mA IOH, 64-mA IOL)
at TAP Support Backplane Interface and/or
High Fanout
D Package Options Include Plastic
Small-Outline (DW) Package, Ceramic Chip
Carriers (FK), and Ceramic 300-mil DIPs (JT)
description
The ’LVT8980 embedded test-bus controllers (eTBC) are members of the TI broad family of testability integrated
circuits. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex
circuit assemblies. Unlike most other devices of this family, the eTBC is not a boundary-scannable device;
rather, its function is to master an IEEE Std 1149.1 (JTAG) test access port (TAP) under the command of an
embedded host microprocessor/microcontroller. Thus, the eTBC enables the practical and effective use of the
IEEE
Std
1149.1
test-access
infrastructure
to
support
embedded/built-in
test,
emulation,
and
configuration/maintenance facilities at board and system levels.
12 13 14 15 16 17 18
SN54LVT8980 ...JT PACKAGE
SN74LVT8980 . . . DW PACKAGE
(TOP VIEW)
5
6
7
8
9
10
11
25
24
23
22
21
20
19
4
3
2
128
RDY
TDO
VCC
NC
TCK
TMS
TRST
D1
D2
D3
NC
GND
D4
D5
SN54LVT8980 . . . FK PACKAGE
(TOP VIEW)
D0
R/W
STRB
TO
E
RST
D7
CLKIN
NC
A1
A2
A0
D6
TDI
27 26
STRB
R/W
D0
D1
D2
D3
GND
D4
D5
D6
D7
CLKIN
A0
A1
A2
RDY
TDO
VCC
TCK
TMS
TRST
TDI
RST
TOE
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
NC – No internal connection
Copyright
2002, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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