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參數(shù)資料
| 型號： | SN54LVTH2952FK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQCC28 |
| 封裝： | CERAMIC, CC-28 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 220K |
| 代理商： | SN54LVTH2952FK |
SN54LVTH2952, SN74LVTH2952
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS710D – OCTOBER 1997 – REVISED APRIL 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
D Ioff and Power-Up 3-State Support Hot
Insertion
D Bus-Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V VCC)
D Support Unregulated Battery Operation
Down to 2.7 V
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), and Ceramic
(JT) DIPs
description
These octal bus transceivers and registers are
designed specifically for low-voltage (3.3-V) VCC
operation, but with the capability to provide a TTL
interface to a 5-V system environment.
The ’LVTH2952 devices consist of two 8-bit back-to-back registers that store data flowing in both directions
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition
of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB or CLKENBA) input is low.
Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Copyright
1999, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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24
23
22
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14
13
B8
B7
B6
B5
B4
B3
B2
B1
OEAB
CLKAB
CLKENAB
GND
VCC
A8
A7
A6
A5
A4
A3
A2
A1
OEBA
CLKBA
CLKENBA
SN54LVTH2952 ...JT PACKAGE
SN74LVTH2952 . . . DB, DGV, DW, OR PW PACKAGE
(TOP VIEW)
CLKAB
CLKENAB
GND
NC
CLKENBA
CLKBA
OEBA
B6
NC
A7
V
B7
B8
A8
CC
32 1 28 27
12 13 14 15 16 17 18
5
6
7
8
9
10
11
25
24
23
22
21
20
19
A6
A5
A4
NC
A3
A2
A1
B5
B4
B3
NC
B2
B1
OEAB
426
SN54LVTH2952 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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