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參數資料
| 型號： | SN74AS825ANT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-24 |
| 文件頁數： | 1/11頁 |
| 文件大小： | 216K |
| 代理商： | SN74AS825ANT |
SN54AS825A . . . JT PACKAGE
SN74AS825A . . . DW OR NT PACKAGE
(TOP VIEW)
SN54AS825A...FK PACKAGE
(TOP VIEW)
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OE1
OE2
1D
2D
3D
4D
5D
6D
7D
8D
CLR
GND
VCC
OE3
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLKEN
CLK
NC No internal connection
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12 13
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2Q
3Q
4Q
NC
5Q
6Q
7Q
2D
3D
4D
NC
5D
6D
7D
426
14 15 16 17 18
8D
CLR
GND
NC
CLK
CLKEN
8Q
1D
OE2
OE1
NC
OE3
1Q
V
C
SN54AS825A, SN74AS825A
8BIT BUSINTERFACE FLIPFLOPS
WITH 3STATE OUTPUTS
SDAS020B JUNE 1984 REVISED AUGUST 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Functionally Equivalent to AMD’s AM29825
Improved I
OH Specifications
Multiple Output Enables Allow Multiuser
Control of the Interface
Outputs Have Undershoot-Protection
Circuitry
Power-Up High-Impedance State
Buffered Control Inputs Reduce dc
Loading Effects
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
description
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. These devices
are
particularly
suitable
for
implementing
multiuser registers, I/O ports, bidirectional bus
drivers, and working registers.
With the clock-enable (CLKEN) input low, the
eight D-type edge-triggered flip-flops enter data
on the low-to-high transitions of the clock (CLK)
input. Taking CLKEN high disables the clock
buffer, latching the outputs. These devices have
noninverting data (D) inputs. Taking the clear
(CLR) input low causes the eight Q outputs to go
low independently of the clock.
Multiuser buffered output-enable (OE1, OE2, and
OE3) inputs can be used to place the eight outputs
in either a normal logic state (high or low logic
level)
or
a
high-impedance
state.
In
the
high-impedance state, the outputs neither load
nor drive the bus lines significantly. The high-
impedance state and increased drive provide the
capability to drive bus lines without interface or
pullup components.
The output enables do not affect the internal operation of the flip-flops. Old data can be retained or new data
can be entered while the outputs are in the high-impedance state.
The SN54AS825A is characterized for operation over the full military temperature range of 55
°C to 125°C. The
SN74AS825A is characterized for operation from 0
°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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PDF描述 |
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| SN74AS832BNE4 | AS SERIES, HEX 2-INPUT OR GATE, PDIP20 |
| SN74AS841ADWR | AS SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| SN74AS841ADW | AS SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| SN74AS841DWR | AS SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| SN54ALS841FK | ALS SERIES, 10-BIT DRIVER, TRUE OUTPUT, CQCC28 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AS825ANTE4 | 功能描述:觸發器 8-Bit Bus-Interface F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74AS826ANT | 制造商:Texas Instruments 功能描述: |
| SN74AS8286N | 制造商:Texas Instruments 功能描述: |
| SN74AS832BDW | 功能描述:邏輯門 Hex 2-Input OR Drivers RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AS832BDWE4 | 功能描述:邏輯門 Hex 2-Input OR Drivers RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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