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參數資料
| 型號： | SN74AUP1G08YEPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | 74AUP1G SERIES, 2-INPUT AND GATE, BGA5 |
| 封裝： | WCSP-5 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 343K |
| 代理商： | SN74AUP1G08YEPR |
www.ti.com
FEATURES
3
2
4
5
1
A
VCC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
5
1
A
VCC
Y
B
GND
3
2
4
5
1
A
VCC
Y
B
GND
A
GND
VCC
Y
B
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
5
DESCRIPTION/ORDERING INFORMATION
AUP
LVC
AUP
LVC
Static-Power Consumption
(
A)
Dynamic-Power Consumption
(pF)
Single, dual, and triple gates
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
SN74AUP1G08
LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE
SCES502D – NOVEMBER 2003 – REVISED JUNE 2005
Wide Operating VCC Range of 0.8 V to 3.6 V
Available in the Texas Instruments
Optimized for 3.3-V Operation
NanoStar and NanoFree Packages
3.6-V I/O Tolerant to Support Mixed-Mode
Low Static-Power Consumption (ICC = 0.9 A
Signal Operation
Max)
tpd = 4.3 ns Max at 3.3 V
Low Dynamic-Power Consumption
Suitable for Point-to-Point Applications
(Cpd = 4.3 pF Typ at 3.3 V)
Latch-Up Performance Exceeds 100 mA Per
Low Input Capacitance (Ci = 1.5 pF Typ)
JESD 78, Class II
Low Noise – Overshoot and Undershoot <10%
ESD Performance Tested Per JESD 22
of VCC
– 2000-V Human-Body Model
Ioff Supports Partial-Power-Down Mode
(A114-B, Class II)
Operation
– 200-V Machine Model (A115-A)
Schmitt-Trigger Action Allows Slow Input
– 1000-V Charged-Device Model (C101)
Transition and Better Switching Noise
ESD Protection Exceeds ±5000 V With
Immunity at the Input (Vhys = 250 mV Typ at
Human-Body Model
3.3 V)
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
Figure 1. AUP – The Lowest-Power Family
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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| SN74AUP1G14DCKT | AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5 |
| SN74AUP1G17DBVRG4 | AUP/ULP/V SERIES, 1-INPUT NON-INVERT GATE, PDSO5 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AUP1G08YFPR | 功能描述:邏輯門 Lo-Pwr Sgl 2-Input RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08YZPR | 功能描述:邏輯門 LoPwrSngl 2Inpt+Gt RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G125DBVR | 功能描述:緩沖器和線路驅動器 Lo Pwr Sngl Bus Buffer Gate RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G125DBVT | 功能描述:緩沖器和線路驅動器 Lo PWR SNGL Bus Bufr Gate RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G125DCKR | 功能描述:緩沖器和線路驅動器 Lo-Pwr Single Bus Buffer Gate RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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