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參數(shù)資料
| 型號(hào)： | SN74AUP1T87DCKR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | XNOR GATE, PDSO5 |
| 封裝： | 2 X 2.10 MM, 1.10 MM HEIGHT, 0.65 MM PITCH, GREEN, PLASTIC, SC-70, 5 PIN |
| 文件頁(yè)數(shù)： | 1/13頁(yè) |
| 文件大小： | 330K |
| 代理商： | SN74AUP1T87DCKR |
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V
CC
Y
A
B
GND
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www.ti.com
SCES806 – APRIL 2010
LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, 2-INPUT
EXCLUSIVE-NOR GATE
Check for Samples: SN74AUP1T87
1
FEATURES
Single-Supply Voltage Translator
More Gate Options Available at
Output Level Up to Supply VCC CMOS Level
ESD Performance Tested Per JESD 22
–
1.8 V to 3.3 V (at VCC = 3.3 V)
–
2000-V Human-Body Model
–
2.5 V to 3.3 V (at VCC = 3.3 V)
(A114-B, Class II)
–
1.8 V to 2.5 V (at VCC = 2.5 V)
–
1000-V Charged-Device Model (C101)
–
3.3 V to 2.5 V (at VCC = 2.5 V
Schmitt-Trigger Inputs Reject Input Noise and
DCK PACKAGE
(TOP VIEW)
Provide Better Output Signal Integrity
Ioff Supports Partial Power Down (VCC = 0 V)
Very Low Static Power Consumption:
0.1 A
Very Low Dynamic Power Consumption:
0.9 A
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Pb-Free Packages Available: SC-70 (DCK)
2 x 2.1 x 0.65 mm (Height 1.1 mm)
DESCRIPTION/ORDERING INFORMATION
The SN74AUP1T87 performs the Boolean function Y = A B with designation for logic-level translation
applications with output referenced to supply VCC.
AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in
operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V
The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external
controllers or processors.
Schmitt-trigger inputs (
ΔVT = 210 mV between positive and negative input transitions) offer improved noise
immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger
inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile
applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of
the device. No damage occurs to the device under these conditions.
The SN74AUP1T87 is designed with optimized current-drive capability of 4 mA to reduce line reflections,
overshoot, and undershoot caused by high-drive outputs.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74AUP1T97DBVR | 功能描述:轉(zhuǎn)換 - 電壓電平 Single-Supply Voltage Translator RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74AUP1T97DBVRE4 | 功能描述:轉(zhuǎn)換 - 電壓電平 16-Bit Fixed-Pt DSP with Flash RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74AUP1T97DBVRG4 | 功能描述:轉(zhuǎn)換 - 電壓電平 SNGL Supply Vltg Translator RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74AUP1T97DBVT | 功能描述:轉(zhuǎn)換 - 電壓電平 Single-Supply Voltage Translator RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SN74AUP1T97DBVT | 制造商:Texas Instruments 功能描述:IC VOLT TRANSLATOR SINGLE SMD |
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