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參數資料
型號: SN74AUP2G126YZPR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發器
英文描述: AUP/ULP/V SERIES, 2-BIT DRIVER, TRUE OUTPUT, PBGA8
封裝: GREEN, DSBGA-8
文件頁數: 1/21頁
文件大小: 814K
代理商: SN74AUP2G126YZPR
DCU PACKAGE
(TOP VIEW)
3
6
1Y
2Y
8
1
VCC
1OE
5
GND
4
2A
2
7
2OE
1A
The exposed center pad, if used, must be connected
only as a secondary GND or left electrically open.
V
CC
1
2
3
4
5
6
7
8
2OE
1Y
2A
GND
2Y
1A
1OE
RSE PACKAGE
(TOP VIEW)
1
8
2
7
3
6
1OE
1A
2Y
GND 4
5
VCC
2OE
1Y
2A
DQE PACKAGE
(TOP VIEW)
1OE
1A
GND
2Y
V
CC
2OE
1Y
2A
YFP OR YZP PACKAGE
(TOP VIEW)
4 5
3 6
2 7
1 8
A1
A2
B1
B2
C1
C2
D1
D2
www.ti.com
SCES687D – JANUARY 2007 – REVISED DECEMBER 2009
LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
Check for Samples: SN74AUP2G126
1
FEATURES
Available in the Texas Instruments NanoStar
Wide Operating VCC Range of 0.8 V to 3.6 V
Package
Optimized for 3.3-V Operation
Low Static-Power Consumption
3.6-V I/O Tolerant to Support Mixed-Mode
(ICC = 0.9 μA Max)
Signal Operation
Low Dynamic-Power Consumption
tpd = 9.9 ns Max at 3.3 V
(Cpd = 4 pF Typ at 3.3 V)
Suitable for Point-to-Point Applications
Low Input Capacitance (Ci = 1.5 pF Typ)
Latch-Up Performance Exceeds 100 mA Per
Low Noise – Overshoot and Undershoot
JESD 78, Class II
<10% of VCC
ESD Performance Tested Per JESD 22
Input-Disable Feature Allows Floating Input
2000-V Human-Body Model
Conditions
(A114-B, Class II)
Ioff Supports Partial-Power-Down Mode
1000-V Charged-Device Model (C101)
Operation
Input Hysteresis Allows Slow Input Transition
and Better Switching Noise Immunity at Input
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2007–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數
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SN74AUP2G14DRYR 功能描述:變換器 Lo-Pwr Dual Schmitt- Trigger Inverter RoHS:否 制造商:NXP Semiconductors 電路數量:6 邏輯系列:74ABT 邏輯類型:BiCMOS 高電平輸出電流:- 15 mA 低電平輸出電流:20 mA 傳播延遲時間:2.2 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 工作溫度范圍: 封裝 / 箱體:DIP-14 封裝:Tube
SN74AUP2G14DSF2 功能描述:變換器 Low-Pwr Dual Schmitt Trigger Inverter RoHS:否 制造商:NXP Semiconductors 電路數量:6 邏輯系列:74ABT 邏輯類型:BiCMOS 高電平輸出電流:- 15 mA 低電平輸出電流:20 mA 傳播延遲時間:2.2 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 工作溫度范圍: 封裝 / 箱體:DIP-14 封裝:Tube
SN74AUP2G14DSFR 功能描述:變換器 Lo-Pwr Dual Schmitt- Trigger Inverter RoHS:否 制造商:NXP Semiconductors 電路數量:6 邏輯系列:74ABT 邏輯類型:BiCMOS 高電平輸出電流:- 15 mA 低電平輸出電流:20 mA 傳播延遲時間:2.2 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 工作溫度范圍: 封裝 / 箱體:DIP-14 封裝:Tube
SN74AUP2G14YFPR 功能描述:變換器 Low-Pwr Dual Schmitt Trigger Inverter RoHS:否 制造商:NXP Semiconductors 電路數量:6 邏輯系列:74ABT 邏輯類型:BiCMOS 高電平輸出電流:- 15 mA 低電平輸出電流:20 mA 傳播延遲時間:2.2 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 工作溫度范圍: 封裝 / 箱體:DIP-14 封裝:Tube
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