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參數(shù)資料
| 型號(hào)： | SN74LVC112ADGVR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | GREEN, PLASTIC, TVSOP-16 |
| 文件頁(yè)數(shù)： | 1/17頁(yè) |
| 文件大小： | 543K |
| 代理商： | SN74LVC112ADGVR |
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www.ti.com
FEATURES
1
2
3
4
5
6
7
8
16
15
14
13
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11
10
9
1CLK
1K
1J
1PRE
1Q
2Q
GND
VCC
1CLR
2CLR
2CLK
2K
2J
2PRE
2Q
D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 4.8 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time
requirements is transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the J and K inputs can be changed without affecting the levels at the outputs. The SN74LVC112A can
perform as a toggle flip-flop by tying J and K high.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube of 40
SN74LVC112AD
SOIC – D
Reel of 2500
SN74LVC112ADR
LVC112A
Reel of 250
SN74LVC112ADT
SOP – NS
Reel of 2000
SN74LVC112ANSR
LVC112A
–40
°C to 85°C
SSOP – DB
Reel of 2000
SN74LVC112ADBR
LC112A
Tube of 90
SN74LVC112APW
TSSOP – PW
Reel of 2000
SN74LVC112APWR
LC112A
Reel of 250
SN74LVC112APWT
TVSOP – DGV
Reel of 2000
SN74LVC112ADGVR
LC112A
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 1993–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVC112ADGVRE4 | 功能描述:觸發(fā)器 8-Bit LVTTL-GTLP Reg Xcvr Adj-Edge-Rate RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC112ADGVRG4 | 功能描述:觸發(fā)器 Dual Neg Edge Trgerd J K FlipFlop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC112ADR | 功能描述:觸發(fā)器 Dual Neg Edge Trig RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC112ADRE4 | 功能描述:觸發(fā)器 Dual Neg-Edge-Trig J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC112ADRG4 | 功能描述:觸發(fā)器 Dual Neg Edge Trgerd J K FlipFlop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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