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參數資料
| 型號： | SN74SSTV32867GKER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封裝： | PLASTIC, LFBGA-96 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 378K |
| 代理商： | SN74SSTV32867GKER |
SN74SSTV32867
26-BIT REGISTERED BUFFER
WITH SSTL_2 INPUTS AND LVCMOS OUTPUTS
SCES362B – OCTOBER 2001 – REVISED MAY 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus
+ Family
D Output Edge-Control Circuitry Minimizes
Switching Noise in an Unterminated DIMM
Load
D Supports SSTL_2 Data Inputs
D Differential Clock (CLK and CLK) Inputs
D Supports LVCMOS Switching Levels on the
RESET Input
D RESET Input Disables Differential Input
Receivers, Resets All Registers, and
Forces All Outputs Low
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
This 26-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation.
All inputs are SSTL_2, except the LVCMOS reset (RESET) input. All outputs are edge-controlled LVCMOS
circuits optimized for unterminated DIMM loads.
The SN74SSTV32867 operates from a differential clock (CLK and CLK). Data are registered at the crossing
of CLK going high and CLK going low.
The device supports low-power standby operation. When RESET is low, the differential input receivers are
disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed. In addition, when
RESET is low, all registers are reset and all outputs are forced low. The LVCMOS RESET always must be held
at a valid logic high or low level.
To ensure defined outputs from the register before a stable clock has been supplied, RESET must be held in
the low state during power up.
Copyright
2002, Texas Instruments Incorporated
Widebus
+ is a trademark of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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相關代理商/技術參數 |
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|---|---|
| SN74SSTV32877GKER | 功能描述:緩沖器和線路驅動器 DUAL BUFFER GATE RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTVF16857GR | 功能描述:緩沖器和線路驅動器 14 Bit RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTVF16857GRG4 | 功能描述:緩沖器和線路驅動器 14 Bit RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTVF16857VR | 功能描述:緩沖器和線路驅動器 14 Bit RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTVF16857VRG4 | 功能描述:緩沖器和線路驅動器 14B Registered Buffer RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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