參數資料
| 型號： | SY58627LMG TR |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | RECEIVER 6.4GBPS W/EQUALIZATION |
| 標準包裝： | 1 |
| 系列： | * |
| 產品目錄頁面： | 1089 (CN2011-ZH PDF) |
| 其它名稱： | 576-1470-6 |
SY58627L
DC-to-6.4Gbps Backplane Receive Buffer with
Four Stage Programmable Equalization
and DC-Offset Control
Precison Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
January 2006
M9999-010606-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY58627L high-speed, low jitter receive buffer is
optimized for backplane and transmission line data-path
management applications. The SY58627L is capable of
receiving serial data up to 6.4Gbps across up to 36
inches of FR4.
The
SY58627L
differential
input
includes
Micrel’s
unique, 3-pin input termination architecture that directly
interfaces to any differential signal as small as 100mVpk
(AC- or DC-coupled) without any termination resistor
networks in the signal path. The outputs are 50
source-terminated CML optimized to drive 400mVpk into
50
(100 load across the output pair). The I/O
termination is connected to a dedicated VTT pin for
added bias flexibility.
The SY58627L receiver input provides four levels of
equalization
to
compensate
for
degraded
signals
resulting from transmission losses. The equalization is
programmed with a three-bit interface.
The SY58627L operates at 3.3V ±10% supply and is
guaranteed over the full industrial temperature range of
-40°C to +85°C. The SY58627L is part of Micrel’s high-
speed, Precision Edge
product line.
All data sheets and support documentation can be found
on Micrel’s web site at: www.micrel.com.
Precision Edge
Features
Selectable equalizing network to optimize incoming
data eye pattern
Four selectable equalization levels
Receives up to 36” FR4 PCB trace, or longer
combinations of FR4+cable+interconnect
DC through 6.4Gbps data rate throughput
Integrated loopback capability
Unique, flexible I/O:
- Patented, Internal termination to VTTIN pin
interfaces to any differential AC- or DC-coupled
signals
- 50
source terminated CML outputs minimize
round-trip reflections
- Wide input voltage range: 100mV to 1.3VPK
- Output disable
- DC-offset control with VTT I/O
Input loss-of-signal
- Hysteresis included
3.3V ±10% supply voltage
-40°C to +85°C temperature range
Available in 32-pin (5mm x 5mm) QFN package
Applications
ATE, T&M backplane management
Serial backplane management
Combination FR4+cable+interconnect receiver
Fibre Channel, GigE, SONET/SDH data
transmission
Electrical interface and interconnect applications
that require DC-offset control
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