參數資料
| 型號： | SY89231UMG TR |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK DIVIDER LVDS 16MLF |
| 標準包裝： | 1,000 |
| 系列： | Precision Edge® |
| 類型： | 時鐘除法器 |
| PLL： | 無 |
| 輸入： | CML，LVDS，PECL |
| 輸出： | LVDS |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 3.2GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應商設備封裝： | 16-MLF?（3x3） |
| 包裝： | 帶卷 (TR) |
SY89231U
3.2GHz Precision, LVDS ÷3, ÷5 Clock Divider
Precision Edge is a registered trademark of Micrel, Inc.
.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
November 2007
M9999-110507-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89231U is a precision, low jitter 3.2GHz
÷3,
÷5 clock divider with a LVDS output. The differential
input
includes
Micrel’s
unique,
3-pin
internal
termination architecture that allows the input to
interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mVPP) without any
level shifting or termination resistor networks in the
signal
path.
The
outputs
are
325mV,
100K-
compatible LVDS with fast rise/fall times guaranteed
to be less than 200ps.
The SY89231U operates from a 2.5V ±5% supply
and
is
guaranteed
over
the
full
industrial
temperature
range
of
–40°C
to
+85°C.
The
SY89231U is part of Micrel’s high-speed, Precision
Edge
product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Block Diagram
Precision Edge
Features
Accepts a high-speed input and provides a precision
÷3 and ÷5 sub-rate, LVDS output
Guaranteed AC performance over temperature and
supply voltage:
–
DC-to >3.2GHz throughput
– <810ps Propagation Delay (In-to-Q)
– <200ps Rise/Fall times
Ultra-low jitter design:
– <1psRMS random jitter
– <1psRMS cycle-to-cycle jitter
– <10psPP total jitter (clock)
– <0.7psRMS MUX crosstalk induced jitter
Unique patented internal termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
Wide input voltage range V
CC to GND
325mV LVDS output
45% to 55% Duty Cycle (÷ 3)
47% to 53% Duty Cycle (÷ 5)
2.5V ±5% supply voltage
-40°C to +85°C industrial temperature range
Available in 16-pin (3mm x 3mm) QFN package
Applications
Fail-safe clock protection
Markets
LAN/WAN
Enterprise servers
ATE
Test and measurement
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