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參數資料
| 型號： | TAS5615PHD2EVM |
| 廠商： | Texas Instruments |
| 文件頁數： | 14/36頁 |
| 文件大小： | 0K |
| 描述： | EVAL MODULE FOR TAS5615PHD2 |
| 標準包裝： | 1 |
| 系列： | * |
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SLAS595B – JUNE 2009 – REVISED FEBRUARY 2010
THEORY OF OPERATION
POWER SUPPLIES
To facilitate system design, the TAS5615 needs only a 12-V supply in addition to the (typical) 50-V power-stage
supply. An internal voltage regulator provides suitable voltage levels for the digital and low-voltage analog
circuitry. Additionally, all circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is
accommodated by built-in bootstrap circuitry requiring only an external capacitor for each half-bridge.
In order to provide outstanding electrical and acoustical characteristics, the PWM signal path, including gate
drive and output stage, is designed as identical, independent half-bridges. For this reason, each half-bridge has
separate gate-drive supply (GVDD_X), bootstrap pins (BST_X), and power-stage supply pins (PVDD_X).
Furthermore, an additional pin (VDD) is provided as supply for all common circuits. Although supplied from the
same 12-V source, it is highly recommended to separate GVDD_A, GVDD_B, GVDD_C, GVDD_D, and VDD on
the printed-circuit board (PCB) by RC filters (see application diagram for details). These RC filters provide the
recommended high-frequency isolation. Special attention should be paid to placing all decoupling capacitors as
close to their associated pins as possible. In general, inductance between the power supply pins and decoupling
capacitors must be avoided. (See reference board documentation for additional information.)
For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin
(BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is
charged through an internal diode connected between the gate-drive power-supply pin (GVDD_X) and the
bootstrap pin. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output
potential and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM
switching frequencies in the range from 300 kHz to 400 kHz, it is recommended to use 33-nF ceramic capacitors,
size 0603 or 0805, for the bootstrap supply. These 33-nF capacitors ensure sufficient energy storage, even
during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully turned-on during the
remaining part of the PWM cycle.
Special attention should be paid to the power-stage power supply; this includes component selection, PCB
placement, and routing. As indicated, each half-bridge has independent power-stage supply pins (PVDD_X). For
optimal electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X pin is
decoupled with a 2.2-mF ceramic capacitor placed as close as possible to each supply pin. It is recommended to
follow the PCB layout of the TAS5615 reference design. For additional information on recommended power
supply and required components, see the application diagrams in this data sheet.
The 12-V supply should be from a low-noise, low-output-impedance voltage regulator. Likewise, the 50-V
power-stage supply is assumed to have low output impedance and low noise. The power-supply sequence is not
critical as facilitated by the internal power-on-reset circuit. Moreover, the TAS5615 is fully protected against
erroneous power-stage turnon due to parasitic gate charging. Thus, voltage-supply ramp rates (dV/dt) are
non-critical within the specified range (see the Recommended Operating Conditions table of this data sheet).
SYSTEM POWER-UP/POWER-DOWN SEQUENCE
Powering Up
The TAS5615 does not require a power-up sequence. The outputs of the H-bridges remain in a high-impedance
state until the gate-drive supply voltage (GVDD_X) and VDD voltage are above the undervoltage protection
(UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). Although not specifically
required, it is recommended to hold RESET in a low state while powering up the device. This allows an internal
circuit to charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output.
Powering Down
The TAS5615 does not require a power-down sequence. The device remains fully operational as long as the
gate-drive supply (GVDD_X) voltage and VDD voltage are above the undervoltage protection (UVP) voltage
threshold (see the Electrical Characteristics table of this data sheet). Although not specifically required, it is a
good practice to hold RESET low during power down, thus preventing audible artifacts including pops or clicks.
Copyright 2009–2010, Texas Instruments Incorporated
21
Product Folder Link(s) :TAS5615
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相關代理商/技術參數 |
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|---|---|
| TAS5615PHDR | 功能描述:音頻放大器 Analog input 160W RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5616 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:160-W STEREO / 300-W MONO PurePatha?￠ HD DIGITAL-INPUT POWER STAGE |
| TAS5616DKD | 功能描述:音頻放大器 PWM inp 150W Stereo class D Amplifier RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5616DKD2EVM | 功能描述:音頻 IC 開發工具 TAS5616DKD2 Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TAS5616DKDR | 功能描述:音頻放大器 PWM inp 150W Stereo class D Amplifier RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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