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參數(shù)資料
| 型號： | TB5R2LDW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUAD DIFFERENTIAL PECL RECEIVERS |
| 中文描述： | 四路差分PECL接收機 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 327K |
| 代理商： | TB5R2LDW |
www.ti.com
FEATURES
Functional Replacements for the Agere
BRF1A, BRF2A, BRS2A, and BRS2B
Pin Equivalent to General Trade 26LS32
High Input Impedance Approximately 8 k
4-ns Maximum Propagation Delay
TB5R1 Provides 50-mV Hysteresis
TB5R2 With -125-mV Threshold Offset for
Preferred State Output
-1.1-V to 7.1-V Common Mode Range
Single 5-V
±
10% Supply
Slew Rate Limited (1 ns min 80% to 20%)
TB5R2 Output Defaults to Logic 1 When In-
puts Left Open or Shorted to V
CC
or GND
ESD Protection HBM > 3 kV, CDM > 2 kV
Operating Temperature Range: -40
°
C to 85
°
C
Available in Gull-Wing SOIC (JEDEC MS-013,
DW) and SOIC (D) Package
DESCRIPTION
These quad differential receivers accept digital data
over balanced transmission lines. They translate
differential input logic levels to TTL output logic
levels.
APPLICATIONS
Digital Data or Clock Transmission Over Bal-
anced Lines
PIN ASSIGNMENTS
AI
AO
BO
CO
DO
AI
BI
BI
C1
D1
C1
D1
E2
E1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AI
AI
AO
E1
BO
BI
BI
GND
VCC
DI
DI
DO
E2
CO
CI
CI
D PACKAGE
(TOP VIEW)
ENABLE TRUTH TABLE
TB5R1, TB5R2
SLLS588B–NOVEMBER 2003–REVISED MAY 2004
QUAD DIFFERENTIAL PECL RECEIVERS
The TB5R1 is a pin- and function-compatible replace-
ment for the Agere systems BRF1A and BRF2A; it
includes 3-kV HBM and 2-kV CDM ESD protection.
The TB5R2 is a pin- and function-compatible replace-
ment for the Agere systems BRS2A and BRS2B and
incorporates a 125-mV receiver input offset, preferred
state output, 3-kV HBM and 2-kV CDM ESD protec-
tion. The TB5R2 preferred state feature places the
high state when the inputs are open, shorted to
ground, or shorted to the power supply.
The power-down loading characteristics of the re-
ceiver input circuit are approximately 8 k
relative to
the power supplies; hence they do not load the
transmission line when the circuit is powered down.
The packaging for these differential line receivers
include a 16-pin gull wing SOIC (DW) and SOIC (D).
The enable inputs of this device include internal
pullup resistors of approximately 40 k
that are
connected to V
CC
to ensure a logical high level input
if the inputs are open circuited.
FUNCTIONAL BLOCK DIAGRAM
E1
0
1
0
1
E2
0
0
1
1
CONDITION
Active
Active
Disabled
Active
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2003–2004, Texas Instruments Incorporated
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TB5R2LDWR | 功能描述:LVDS 接口集成電路 Hi Spd Diff Receiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5R3 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUAD DIFFERENTIAL PECL RECEIVERS |
| TB5R3D | 功能描述:LVDS 接口集成電路 QUAD PECL RECEIVER RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5R3DG4 | 功能描述:LVDS 接口集成電路 Quad PECL Receiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5R3DR | 功能描述:LVDS 接口集成電路 QUAD PECL RECEIVER RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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