
TFB2002BM
FUTUREBUS+ I/O CONTROLLER
SGLS073A – JANUARY 1992 – REVISED MARCH 1994
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1994, Texas Instruments Incorporated
8–1
Provides Control Logic Necessary to
Operate a Data-Path Unit (TFB2022A) on
Futurebus+
Parallel-Protocol Support Is Fully
Compliant to Futurebus+ Standard
(IEEE Std 896.1–1991)
Interfaces Easily to a Variety of Popular
Microprocessors Such as SPARC
, R4000,
680X0, 88XXX, 80X86, and Alpha AXP
Package is a Ceramic Quad Flat-Pack With
a 3-Inch Nonconductive Tie Bar,
Lead Pitch Is 0.5 mm (19.7 mil)
Provides Full Support for Futurebus+
Cache Commands (for Memory or I/O
Modules in Shared-Memory Systems)
Capable of Handling a Single Outstanding
Split Transaction
Parallel-Protocol-Related CSR Locations
Are Provided on Chip
Offers Autonomous Control for Futurebus+
and Host-Module Reads and Writes
description
The TFB2002BM I/O controller (IOC) is a member of the Texas Instruments Futurebus+ chip set. This chip set
provides a highly integrated approach to the Futurebus+ interface that reduces new-product design time, allows
more functionality per circuit board, improves overall interface reliability, and reduces end-user down time
through built-in test capabilities. The Futurebus+ chip set is capable of supporting 32- or 64-bit data widths in
any combination on both the host interface and Futurebus+. The address width is programmable to be 32 bits
or 36 bits (with either data width).
The TFB2002BM contains the control logic necessary to translate Futurebus+ transactions into host bus
transactions and vice versa. It contains a high-speed Futurebus+ handshake controller, a synchronous host bus
controller, and a reset type determination logic.
When controlled with a TFB2022AM Futurebus+ data-path unit (DPU), the TFB2002BM provides a complete
64-bit-wide interface to the Futurebus+. The TFB2002BM provides the necessary control logic for the data-path
unit to provide a complete interface to the Futurebus+ for a Profile-B-compliant module. It can also be used on
I/O or memory modules in a cache-coherent system.
The TFB2002BM is characterized over the full military temperature range of –55
°
C to 125
°
C.
NOTE: To maintain consistency with the notation used in the Futurebus+ standard (IEEE Std 896.1–1991), an active-low signal is denoted herein
by use of the trailing asterisk(*) on the signal name.
SPARC is a trademark of Sun Microsystems, Inc.
Alpha AXP is a trademark of Digital Equipment Corporation.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P