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參數資料
| 型號： | TFP6422PAP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, THERMALLY ENHANCED, POWER, PLASTIC, TQFP-64 |
| 文件頁數： | 6/65頁 |
| 文件大小： | 813K |
| 代理商： | TFP6422PAP |
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TFP6422, TFP6424
PanelBus
DIGITAL TRANSMITTER/VIDEO ENCODER COMBO
SLDS118 – MARCH 2000
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional description (continued)
digital input video formats
Utilizing its multiple digital input video formats, TFP6422 and TFP6424 provides a flexible interface to the
external digital video sources such as compressed video from DVD, streaming video content from the Web,
cable or any broadband media, graphics and text images typical for PCs. The digital input video formats are
characterized by the following properties:
D Color space:
RGB or YCbCr
D Pixel format:
4:4:4 or 4:2:2
D Color component order: Normal (Cb first) or reverse (Cr first)
D Scan format:
Progressive or interlaced
D Synchronization:
External sync or embedded sync
Although it is not cost effective to support all possible permutations of formats, TFP6422 and TFP6424 does
support the most commonly used formats required by most of the applications. Refer to the video output section
for the details of the supported digital input video formats.
The digital input video formats supported for a particular configuration are related to the video output formats.
When TFP6422 and TFP6424 is programmed for one of TV video output modes, all digital input video formats
listed in Table 3 are supported. When TFP6422 and TFP6424 is in either DVI or progressive RGB output mode,
only RGB input formats are supported.
data manager
Data Manager resides at the very beginning of the processing pipeline. Data manager is responsible for
receiving pixel data from the video port, and based on the selected input pixel format and output video format,
performs format conversions and dispatches the converted pixel data to the proper video processing unit to
create the required video output. The input pixel formats supported by TFP6422/6424 are described in detail
in the F_CONTROL register, sub address 3A.
When TV video output mode is enabled (VIDOUT[3:0] = 0001, 0010, 0011, 0100 or 0101), data manager
receives the pixel data in various formats from the video port and converts them to internal YUV representation
required by the TV encoder for further TV video encoding process. When DVI output mode is enabled, the input
pixel format must be set for 24-bit RGB mode (FMT[3:2] = 00) for correct operation and data manager passes
the RGB data to the DVI encoder without processing. When RGB output mode is enabled, similar to DVI output
mode, Data manager passes the RGB data to the video output DACs, converting the digital RGB pixel data to
analog RGB video output.
Data manager consists of two functional units: RGB-to-YCbCr color space converter and chrominance
decimator. The RGB-to-YCbCr color space converter converts the 24-bit RGB pixel data to 24-bit YCbCr
representation with 8 bits in each of Y, Cb and Cr components. If the input pixel data is already in 24–bit YCrCb
format, the data is bypasses the color space converter. The remaining Cb and Cr color components enter the
2-to-1 chrominance decimator which reduces the chrominance bandwidth and the amount of chrominance data
by half. The reduction of chrominance data decreases the amount of buffering required for vertical scaling
process by the scaling processor. If the input pixel data is already in 4:2:2 YCbCr format, both the RGB-to-YCrCb
color space converter and chrominance decimator are bypassed.
PRODUCT
PREVIEW
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