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參數資料
| 型號： | THS1031IPWLE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 10-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | PLASTIC, TSSOP-28 |
| 文件頁數： | 22/22頁 |
| 文件大小： | 296K |
| 代理商： | THS1031IPWLE |
THS1031
COMPLETE SOLUTION 2.7 V ~ 5.5 V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242 – NOVEMBER 1999
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PRINCIPLES OF OPERATION
Table 1. Mode Selection
MODES
ANALOG
INPUT
SPAN
MODE
PIN
REFSENSE
PIN
VREF
PIN
REFTS
PIN
REFBS
PIN
FIGURE
AIN
1 V
AVDD
Short together
AGND
3, 10
AIN
2 V
AVDD
AGND
Short together
AGND
4, 11
Top/bottom
AIN
1+Ra/Rb
AVDD
Mid Ra & Rb
Short together to Ra
AGND
5, 10, 11
AIN
External
VREF
AVDD
Short together
AGND
6, 10,11
AIN
1 V
AVDD/2
Short together
3, 9
Center span
AIN
2 V
AVDD/2
AGND
NC
Short together to the
4, 9
Center span
AIN
1+Ra/Rb
AVDD/2
Mid Ra & Rb
Ra
g
common mode voltage
5, 9
AIN
VREF
AVDD/2
AVDD
External
6, 9
External
reference
AIN
2 V max
AGND
See Note 1
Voltage within supply
(REFTS–REBS) = 2 V max
7, 8
AIN is input 1
REFTS &
1 V
AVDD/2
Short together
Differential
input
REFBS are
shorted
2 V
AVDD/2
AGND
NC
Short together AVDD/2
12
together for
input 2
VREF
AVDD/2
AVDD
External
NOTE 1: In external reference mode, VREF can be available for external use with CENTER SPAN setup.
reference operations
VREF-pin reference
The voltage reference sources on the VREF pin are controlled by the REFSENSE pin as shown in Table 2.
Table 2. VREF Reference Selection
REFSENSE
VREF
AGND
2 V
AVDD
The internal reference is disabled and an external reference should be connected to VREF pin if
mode = AVDD/2
Short to VREF
1 V
Connect to Ra/Rb
1+Ra/Rb
PRODUCT
PREVIEW
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