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參數(shù)資料
| 型號： | THS1031IPWLE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 10-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | PLASTIC, TSSOP-28 |
| 文件頁數(shù)： | 7/22頁 |
| 文件大小： | 296K |
| 代理商： | THS1031IPWLE |
THS1031
COMPLETE SOLUTION 2.7 V ~ 5.5 V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242 – NOVEMBER 1999
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
analog input mode(continued)
differential input
In this mode, the first differential input is applied to the AIN pin and the second differential input is applied to the
common point where REFTS and REFBS are tied together. The common mode of the input should be set to
AVDD/2 as shown in Figure 12. The maximum magnitude of the differential input signal should be equal to VREF.
SHA
A/D
PGA
REFBF
REFTF
MODE
REFBS
REFTS
10
F
0.1
F
AIN
VREF
THS1031
AVDD/2
0.1
F
ADC
REF
VREF
0.1
F
AVDD
VREF is either internal or external
Figure 12. Differential Input
digital input mode
The THS1031 contains 4 registers: two CLAMP registers, a CONTROL register, and a TEST register. The TEST
register is reserved for test purposes. Binary data can be written into the CLAMP and CONTROL registers via
I/O0 – I/O9 by inserting an active-low write strobe to the WR input pin and an active-low signal to the OE input
pin. This will disable the ADC’s output bus. The two MSBs of each register are address bits. For example, set
bit 9 and bit 8 to 00 to select the clamp register 1. Set bit 9 and bit 8 to 01 to select the clamp register 2.
clamp registers
The internal digital clamp circuit uses a 10-bit DAC to convert the 10-bit digital value into the analog clamp level
in which the clamp register 1 contains 8 LSBs of DAC(7:0). The clamp register 2 contains two MSBs of the
DAC(9:8). DAC(9:8)
(Default = 00): For clamping purpose, the entire range of voltage reference VREF is divided
into 4 quarters which can be selected by bit 0 (DAC8) and bit 1 (DAC9) in the clamp register 2. The user can
clamp to any of 256-dc levels within each quarter determined by the 8-bit content of the clamp register 1. Figure
13 shows how the DACs 10-bit digital input map to the analog clamping range from 0 V to VREF.
D Clamp Register 1
9
8
7
6
5
4
3
2
1
0
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
D Clamp Register 2
9
8
7
6
5
4
3
2
1
0
1
X
DAC9
DAC8
PRODUCT
PREVIEW
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| THS1031IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031IPWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031SOIC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER |
| THS1031TSSOP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER |
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