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參數資料
| 型號： | THS1206IDA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封裝： | GREEN, PLASTIC, TSSOP-32 |
| 文件頁數： | 14/43頁 |
| 文件大小： | 722K |
| 代理商： | THS1206IDA |
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THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
www.ti.com
21
FIFO DESCRIPTION
In order to facilitate an efficient connection to today’s processors, the THS1206 is supplied with a FIFO. This integrated
FIFO enables a problem-free processing of data with today’s processors. The FIFO is provided as a flexible circular buffer.
The circular buffer integrated in the THS1206 can store up to 16 conversion values. Therefore, the amount of interrupts
to be served by a processor can be reduced significantly.
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1
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Read Pointer
Trigger Pointer
Write Pointer
Data in FIFO
Free
Figure 29. Circular Buffer
The converted data of the THS1206 is automatically written into the FIFO. To control the writing and reading process, a
write pointer, a read pointer and a trigger pointer are used. The read pointer always shows the location which is read next.
The write pointer indicates the location which contains the last written sample. With a selection of multiple analog input
channels, the converted values are written in a predefined sequence to the circular buffer (autoscan mode). In this way,
the channel information for the reading processor is continually maintained.
The FIFO can be programmed through the control register of the ADC. The user has the ability to select a specific trigger
level according to Table 13 in order to choose the configuration which best fits the application. The FIFO provides the signal
DATA_AV, which signals the processor to read the amount of data equal to the trigger level selected in Table 13. The signal
DATA_AV becomes active when the trigger condition is satisfied. The trigger condition is satisfied when as many values
as selected for the trigger level are written into the FIFO.
The signal DATA_AV could be connected to an interrupt input of a processor. In every interrupt service routine call, the
processor must read the amount of data equal to the trigger level from the ADC. The first data represents the first channel
according to the autoscan mode, which is shown in Table 10. The channel information is therefore always maintained.
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| THS1206IDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206QDA | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDAG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDARG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206IDARG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| THS1206IDA | 制造商:Texas Instruments 功能描述:A/D CONVERTER ((NW)) |
| THS1206IDAG4 | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206IDAR | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206IDARG4 | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206MDA | 制造商:Texas Instruments 功能描述:ADC SGL PIPELINED 6MSPS 12-BIT PARALLEL 32TSSOP - Tape and Reel |
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