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參數資料
| 型號： | THS1206IDA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封裝： | GREEN, PLASTIC, TSSOP-32 |
| 文件頁數： | 15/43頁 |
| 文件大小： | 722K |
| 代理商： | THS1206IDA |
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THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
www.ti.com
22
READING DATA FROM THE FIFO
The THS1206 informs the connected processor via the digital output DATA_AV (data available) that a block of conversion
values are ready to be read. The block size to be read is always equal to the setting of the trigger level. The selectable trigger
levels depend on the number of selected analog input channels. For example, when choosing one analog input, a trigger
level of 1, 4, 8 and 14 can be selected. The following figures demonstrate the principle of reading the data.
In Figure 30, a trigger level of 1 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 1 value from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 30. Trigger Level 1 Selected
In Figure 31, a trigger level of 4 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 4 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 31. Trigger Level 4 Selected
In Figure 32, a trigger level of 8 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 8 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 32. Trigger Level 8 Selected
In Figure 33, a trigger level of 14 is selected. The control signal DATA_AV is set to an active low pulse. This means that
the connected processor has the task to read 14 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 33. Trigger Level 14 Selected
READ is always the logical combination of CS0, CS1, and RD.
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PDF描述 |
|---|---|
| THS1206IDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206QDA | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDAG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDARG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206IDARG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| THS1206IDA | 制造商:Texas Instruments 功能描述:A/D CONVERTER ((NW)) |
| THS1206IDAG4 | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206IDAR | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206IDARG4 | 功能描述:模數轉換器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1206MDA | 制造商:Texas Instruments 功能描述:ADC SGL PIPELINED 6MSPS 12-BIT PARALLEL 32TSSOP - Tape and Reel |
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