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參數資料
| 型號： | TLC1541IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, SOIC-20 |
| 文件頁數： | 10/13頁 |
| 文件大小： | 182K |
| 代理商： | TLC1541IDW |
TLC1541
10-BIT ANALOG-TO-DIGITAL CONVERTER
WITH SERIAL CONTROL AND 11 INPUTS
SLAS073C – DECEMBER 1995 – REVISED AUGUST 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics over recommended operating temperature range,
VCC = Vref+ = 4.75 V to 5.5 V, fclock(I/O) = 1.1 MHz, fclock(SYS) = 2.1 MHz
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
EL
Linearity error
See Note 5
±1
LSB
EZS
Zero-scale error
See Notes 2 and 6
±1
LSB
EFS
Full-scale error
See Notes 2 and 6
±1
LSB
ET
Total unadjusted error
See Note 7
±1
LSB
Self-test output code
Input A11 address = 1011 (see Note 8)
0111110100
(500)
1000001100
(524)
tconv
Conversion time
21
s
Total access and conversion time
31
s
Channel acquisition time (sample cycle)
See Operating Sequence
6
I/O
clock
cycles
tv
Time output data remains valid after I/O
CLOCK
↓
10
ns
td
Delay time, I/O CLOCK
↓ to DATA OUT valid
400
ns
ten
Output enable time
150
ns
tdis
Output disable time
See Figure 1
150
ns
tr(bus)
Data bus rise time
300
ns
tf(bus)
Data bus fall time
300
ns
NOTES:
2. Analog input voltages greater than that applied to REF + convert as all ones (1111111111), while input voltages less than that applied
to REF – convert as all zeros (0000000000). For proper operation, REF + voltage must be at least 1 V higher than REF – voltage.
Also, the total unadjusted error may increase as this differential reference voltage falls below 4.75 V.
5. Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
6. Zero-scale error is the difference between 0000000000 and the converted output for zero input voltage; full-scale error is the
difference between 1111111111 and the converted output for full-scale input voltage.
7. Total unadjusted error includes linearity, zero-scale, and full-scale errors.
8. Both the input address and the output codes are expressed in positive logic. The A11 analog input signal is internally generated and
used for test purposes.
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