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參數(shù)資料
| 型號(hào)： | TLC1541IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, SOIC-20 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大小： | 182K |
| 代理商： | TLC1541IDW |
TLC1541
10-BIT ANALOG-TO-DIGITAL CONVERTER
WITH SERIAL CONTROL AND 11 INPUTS
SLAS073C – DECEMBER 1995 – REVISED AUGUST 1996
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
simplified analog input analysis
Using the equivalent circuit in Figure 2, the time required to charge the analog input capacitance from 0 V to
VS within 1/2 LSB can be derived as follows:
The capacitance charging voltage is given by
VC = VS 1–e
–tc/RtCi
(
)
(1)
where
Rt = Rs + ri
The final voltage to 1/2 LSB is given by
(2)
VC (1/2 LSB) = VS – (VS/2048)
Equating equation 1 to equation 2 and solving for time (tc) gives
VS –(VS/2048) = VS 1–e
(
)
(3)
–tc/RtCi
and
tc (1/2 LSB) = Rt × Ci × ln(2048)
(4)
Therefore, with the values given, the time for the analog input signal to settle is
(5)
tc (1/2 LSB) = (Rs + 1 k) × 55 pF × ln(2048)
This time must be less than the converter sample time shown in the timing diagrams.
VI = Input Voltage at INPUT A0 – A10
VS = External Driving Source Voltage
Rs = Source Resistance
ri = Input Resistance
Ci = Input Capacitance
Driving source requirements:
Noise and distortion levels for the source must be at least
equivalent to the resolution of the converter.
Rs must be real at the input frequency.
Rs
ri
VS
VC
55 pF MAX
1 k
MAX
Driving Source
TLC1541
Ci
VI
Figure 2. Equivalent Input Circuit Including the Driving Source
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