- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98239 > TLC3548IDWG4 (TEXAS INSTRUMENTS INC) 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 PDF資料下載
參數(shù)資料
| 型號： | TLC3548IDWG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | GREEN, PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 43/44頁 |
| 文件大小： | 1000K |
| 代理商： | TLC3548IDWG4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當前第43頁第44頁
TLC3544, TLC3548
5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL
ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
SLAS266C – OCTOBER 2000 – REVISED MAY 2003
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
general electrical characteristics over recommended operating free-air temperature range,
single-ended input, normal long sampling, 200 KSPS, AVDD = 5 V, external reference (VREFP = 4V,
VREFM = 0 V) or internal reference, SCLK frequency = 25 MHz, fixed channel at CONV mode 00,
analog input signal source resistance = 25
(unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC Accuracy—Normal Short Sampling
EL
Integral linearity error
See Note 3
±0.8
LSB
ED
Differential linearity error
±0.6
LSB
EO
Zero offset error
See Note 4
–3
±0.6
3
LSB
E(g+)
Gain error
See Note 4
0
5
12
LSB
AC Accuracy—Normal Long Sampling
SINAD
Signal to noise ratio + distortion
fi = 20 kHz
78.6
80.8
dB
SINAD
Signal-to-noise ratio + distortion
fi = 100 kHz
77.6
dB
THD
Total harmonic distortion
fi = 20 kHz
–95
–90
dB
THD
Total harmonic distortion
fi = 100 kHz
–88
dB
SFDR
Spurious free dynamic range
fi = 20 kHz
90
97
dB
SFDR
Spurious free dynamic range
fi = 100 kHz
89
dB
ENOB
Effective number of bits
fi = 20 kHz
12.8
13.1
Bits
ENOB
Effective number of bits
fi = 100 kHz
12.6
Bits
SNR
Signal to noise ratio
fi = 20 kHz
79
81
dB
SNR
Signal-to-noise ratio
fi = 100 kHz
78
dB
Channel-to-channel isolation (see
Notes 2 and 5)
Fixed channel in conversion mode 00, fi = 35 kHz
100
dB
Analog input bandwidth
Full power bandwidth, –1 dB
2
MHz
Analog input bandwidth
Full power bandwidth, –3 dB
2.5
MHz
AC Accuracy—Normal Short Sampling
SINAD
Signal to noise ratio + distortion
fi = 20 kHz
78.9
dB
SINAD
Signal-to-noise ratio + distortion
fi = 100 kHz
77.6
dB
THD
Total harmonic distortion
fi = 20 kHz
–95
dB
THD
Total harmonic distortion
fi = 100 kHz
–88
dB
SNR
Signal to noise ratio
fi = 20 kHz
79
dB
SNR
Signal-to-noise ratio
fi = 100 kHz
78
dB
ENOB
Effective number of bits
fi = 20 kHz
12.8
Bits
ENOB
Effective number of bits
fi = 100 kHz
12.6
Bits
SFDR
Spurious free dynamic range
fi = 20 kHz
97
dB
SFDR
Spurious free dynamic range
fi = 100 kHz
89
dB
Channel-to-channel isolation (see
Notes 2 and 5)
Fixed channel in conversion mode 00, fi = 35 kHz
100
dB
Analog input bandwidth
Full power bandwidth, –1 dB
2
MHz
Analog input bandwidth
Full power bandwidth, –3 dB
2.5
MHz
All typical values are at TA = 25°C.
NOTES:
2. This is for a fixed channel in conversion mode 00 or 01. When switching the channels, additional multiplexer setting time is required
to overcome the memory effect of the charge redistribution DAC (refer to Figure 8).
3. Linear error is the maximum deviation from the best fit straight line through the A/D transfer characteristics.
4. Zero offset error is the difference between 0000000000000 and the converted output for zero input voltage; gain error is the
difference between 11111111111111 and the converted output for full-scale input voltage. The full-scale input voltage is equal to the
reference voltage being used.
5. It is measured by applying a full-scale of 35 kHz signal to other channels and determining how much the signal is attenuated in the
channel of interest. The converter samples this examined channel continuously. The channel-to-channel isolation is degraded if the
converter samples different channels alternately (refer to Figure 8).
相關PDF資料 |
PDF描述 |
|---|---|
| TLC3544IPW | 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLC3548CDWG4 | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| TLC3544CDW | 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLC3548CPWRG4 | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| TLC3548CDW | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLC3548IDWR | 功能描述:模數(shù)轉換器 - ADC 14-bit 5V 200KSPS 8-Channel Unipolar RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLC3548IDWRG4 | 功能描述:模數(shù)轉換器 - ADC 14-bit 5V 200KSPS 8-Channel Unipolar RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLC3548IPW | 功能描述:模數(shù)轉換器 - ADC 14-bit 5V 200KSPS 8-Channel Unipolar RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLC3548IPW | 制造商:Texas Instruments 功能描述:14BIT ADC 200KSPS 3548 TSSOP24 制造商:Texas Instruments 功能描述:14BIT ADC, 200KSPS, 3548, TSSOP24 |
| TLC3548IPWG4 | 功能描述:模數(shù)轉換器 - ADC 14-bit 5V 200KSPS 8-Channel Unipolar RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復。