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參數資料
型號: TLC5617AIDR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8
封裝: PLASTIC, SO-8
文件頁數: 6/21頁
文件大小: 307K
代理商: TLC5617AIDR
TLC5617, TLC5617A
PROGRAMMABLE DUAL 10-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS151B – JULY 1997 – REVISED MARCH 2000
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
latch B and double-buffer 1 write (D15 = low, D12 = low)
The SIR data are written to both latch B and the double buffer. Latch A is unaffected.
Serial
Interface
Register
D12 = Low
Latch A
Latch B
Double
Buffer
Latch
To DAC A
To DAC B
D15 = Low
Figure 20. Latch B and Double-Buffer Write
double-buffer-only write (D15 = low, D12 = high)
The SIR data are written to the double buffer only. Latch A and B contents are unaffected.
Serial
Interface
Register
D12 = High
Latch A
Latch B
Double
Buffer
To DAC A
To DAC B
D15 = Low
Figure 21. Double-Buffer-Only Write
purpose and use of the buffer
Normally only one DAC output can change after a write. The double buffer allows both DAC outputs to change
after a single write. This is achieved by the two following steps.
1.
A double-buffer-only write is executed to store the new DAC B data without changing the DAC A and B
outputs.
2.
Following the previous step a write to latch A is executed. This writes the SIR data to latch A and also writes
the double-buffer contents to latch B. Thus both DACs receive their new data at the same time and so both
DAC outputs begin to change at the same time.
Unless a double-buffer-only write is issued, the latch B and double-buffer contents are identical. Thus, following
a write to latch A or B with another write to latch A does not change the latch B contents.
相關PDF資料
PDF描述
TLC5617ACDR SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8
TLC5617CDR SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8
TLC5617ID SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8
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TLC5617AIP SERIAL INPUT LOADING, 2 us SETTLING TIME, 10-BIT DAC, PDIP8
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