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參數(shù)資料
| 型號(hào)： | TLC5617AIDR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| 封裝： | PLASTIC, SO-8 |
| 文件頁(yè)數(shù)： | 7/21頁(yè) |
| 文件大小： | 307K |
| 代理商： | TLC5617AIDR |
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TLC5617, TLC5617A
PROGRAMMABLE DUAL 10-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS151B – JULY 1997 – REVISED MARCH 2000
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
operational examples
changing the latch A data from zero to full code
Assuming that latch A starts at zero code (e.g., after power up), the latch can be filled with 1s by writing (bit D15
on the left, D0 on the right)
1X0X 1111 1111 11XX
to the serial interface. Bit D14 can be zero to select slow mode or one to select fast mode. The other Xs can
be zero or one (don’t care).
The latch B contents and the DAC B output are not changed by this write unless the double-buffer contents are
different from the latch B contents. This can only be true if the last write was a double-buffer-only write.
changing the latch B data from zero to full code
Assuming that latch B starts at zero code (e.g., after power-up), the latch can be filled with 1s by writing (bit D15
on the left, D0 on the right).
0X00 1111 1111 11XX
to the serial interface. Bit D14 can be zero to select slow mode or one to select fast mode. The other Xs can
be zero or one (don’t care). The data (bits D0 to D11) are written to both the double buffer and latch B.
The latch A contents and the DAC A output are not changed by this write.
double-buffered change of both DAC outputs
Assuming that DACs A and B start at zero code (e.g., after power-up), if DAC A is to be driven to mid-scale and
DAC B to full-scale, and if the outputs are to begin rising at the same time, this can be achieved as follows:
First,
0d01 1111 1111 11XX
is written (bit D15 on the left, D0 on the right) to the serial interface. This loads the full-scale code into the double
buffer latch but does not change the latch B contents and the DAC B output voltage. The latch A contents and
the DAC A output are also unaffected by this write operation.
Changing from fast to slow mode or slow to fast mode changes the supply current which can glitch the outputs,
and so D14 (designated by d in the data word) should be set to maintain the speed made set by the previous
write. The other Xs can be ones or zeros (don’t care).
Next,
1X0X 1000 0000 00XX
is written (bit D15 on the left, D0 on the right) to the serial interface. Bit D14 can be zero to select slow mode
or one to select fast mode. The other Xs can be zero or one (don’t care). This writes the mid-scale code
(1000000000XX) to latch A and also copies the full-scale code from the double buffer to latch B. Both DAC
outputs thus begin to rise after the second write.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC5617ACDR | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| TLC5617CDR | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| TLC5617ID | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| TLC5617ACP | SERIAL INPUT LOADING, 2 us SETTLING TIME, 10-BIT DAC, PDIP8 |
| TLC5617AIP | SERIAL INPUT LOADING, 2 us SETTLING TIME, 10-BIT DAC, PDIP8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC5617CD | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLC5617CDR | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLC5617ID | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLC5618 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS |
| TLC5618A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS |
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