- 您現在的位置：買賣IC網 > PDF目錄98244 > TLC7135CN (TEXAS INSTRUMENTS INC) 1-CH 4-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP28 PDF資料下載
參數資料
| 型號： | TLC7135CN |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 4-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP28 |
| 封裝： | GREEN, PLASTIC, DIP-28 |
| 文件頁數： | 2/17頁 |
| 文件大?。?/td> | 458K |
| 代理商： | TLC7135CN |
ICL7135C, TLC7135C
4 1/2DIGIT PRECISION
ANALOGTODIGITAL CONVERTERS
SLAS074D DECEMBER 1986 REVISED SEPTEMBER 2003
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Minimum Clock Frequency
The minimum clock frequency limitations result from capacitor leakage from the auto-zero and reference
capacitors. Measurement cycles as high as 10
s are not influenced by leakage error.
Rejection of 50-Hz or 60-Hz Pickup
To maximize the rejection of 50-Hz or 60-Hz pickup, the clock frequency should be chosen so that an integral
multiple of 50-Hz or 60-Hz periods occur during the signal integrate phase. To achieve rejection of these signals,
some clock frequencies that can be used are:
50 Hz: 250, 166.66, 125, 100 kHz, etc.
60 Hz: 300, 200, 150, 120, 100, 40, 33.33 kHz, etc.
Zero-Crossing Flip-Flop
This flip-flop interrogates the comparator’s zero-crossing status. The interrogation is performed after the
previous clock cycle and the positive half of the ongoing clock cycle has occurred, so any comparator transients
that result from the clock pulses do not affect the detection of a zero-crossing. This procedure delays the
zero-crossing detection by one clock cycle. To eliminate the inaccuracy, which is caused by this delay, the
counter is disabled for one clock cycle at the beginning of the deintegrate phase. Therefore, when the
zero-crossing is detected one clock cycle later than the zero-crossing actually occurs, the correct number of
counts is displayed.
Noise
The peak-to-peak noise around zero is approximately 15
V (peak-to-peak value not exceeded 95% of the
time). Near full scale, this value increases to approximately 30
V. Much of the noise originates in the auto-zero
loop, and is proportional to the ratio of the input signal to the reference.
Analog and Digital Grounds
For high-accuracy applications, ground loops must be avoided. Return currents from digital circuits must not
be sent to the analog ground line.
Power Supplies
The ICL7135C and TLC7135C are designed to work with
±5-V power supplies. However, 5-V operation is
possible when the input signal does not vary more than
±1.5 V from midsupply.
相關PDF資料 |
PDF描述 |
|---|---|
| TLC7135CDWR | 1-CH 4-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDSO28 |
| TLC7135CNG4 | 1-CH 4-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP28 |
| TLC7225CDW | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24 |
| TLC7225IDW | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24 |
| TLC7225IDWR | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLC7135CNG4 | 功能描述:LED顯示驅動器 4.5Bs 0.003kSPS ADC 1Ch RoHS:否 制造商:Micrel 數位數量:5 片段數量: 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| TLC7135CN-TI | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) NUMBER OF |
| TLC7225C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS |
| TLC7225CDW | 功能描述:數模轉換器- DAC Quad DAC 8bit RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| TLC7225CDW | 制造商:Texas Instruments 功能描述:IC's |
發布緊急采購，3分鐘左右您將得到回復。