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參數(shù)資料
型號: TLV320AIC10CGQER
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝: MICRO, PLASTIC, BGA-80
文件頁數(shù): 20/57頁
文件大小: 454K
代理商: TLV320AIC10CGQER
3–1
3 Serial Communications
DOUT, DIN, SCLK, SXCLK, FS, and Fc are the serial communication signals. SCLK is used to perform internal
processing and data transfer for serial interface between AIC10 and DSP. In the pulse/frame FS mode, there are 256
SCLKs per sampling period (512 if there are more than 4 devices in cascade). The digital-output data for the ADC
is taken from DOUT. The digital-input data for the DAC is applied to DIN. The synchronization clock for the serial
communication data and the frame-sync is taken from SCLK. The frame-sync signal that starts the ADC and DAC
data-transfer interval is taken from FS. Primary serial communication is used for signal data transmitted from the ADC
or to the DAC. Secondary communication is used to read or write words that control both the options and the circuit
configurations of the device.
The purpose of the primary and secondary communications is to allow conversion data and control data to be
transferred across the same serial port. A primary transfer is always dedicated to conversion data. A secondary
transfer or an asynchronous communication is used to set up and/or read the register values. A primary transfer
occurs for every conversion period. A secondary transfer occurs only when requested. Secondary serial
communication can be requested either by hardware (FC terminal) or by software (D0 of primary data input to DIN).
The direct configuration mode uses pin DCSI to program control registers instantly.
3.1
Primary Serial Communication
Primary serial communication is used to transmit and receive conversion signal data. The DAC word length depends
on the states of bit D0 in control register 1. After power up or reset, the device defaults to 15-bit mode. When the DAC
word length is 15 bits, the last bit of the primary 16-bit serial communication word is a control bit used to request
secondary serial communication. In the 16-bit mode, all 16 bits of the primary-communication word are used as data
for the DAC, and the hardware terminal FC must be used to request secondary communication.
Figure 3-1 shows the timing relationship for SCLK, FS, DOUT, and DIN in a primary communication. The timing
sequence for this operation is as follows:
FS is brought low by the TLV320AIC10.
A 16-bit word is transmitted from the ADC (DOUT), and then a 16-bit word is received from the DAC (DIN).
D0
D13
D15 D14
D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
SCLK
FS
DIN
D0
D13
D15 D14
D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
DOUT
Figure 3–1. Primary Serial Communication Timing
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