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參數資料
| 型號： | TLV320AIC13C |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
| 封裝： | PLASTIC, SOP-30 |
| 文件頁數： | 19/55頁 |
| 文件大小： | 455K |
| 代理商： | TLV320AIC13C |
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3–13
3.8.2
Continuous Data Transfer Mode
The continuous data transfer mode, selected by setting bit D6 of the control register 1 to 1, contains conversion data
only. In continuous data transfer mode, the control frame is eliminated and the period of FS signal contains only the
data frame in which the 16-bit data is transferred contiguously, with no inactivity between bits. The control frame can
be reactivated by setting the LSB of DIN data to 1 if the data is in the 15+1 format. To return the programming mode
in the 16-bit DAC data format mode, write 0 in bit D6 of control register 1 using I2C or S2C, or do a hardware reset
to come out of continuous data transfer mode. The continuous data transfer mode can support the TI DSP McBSPs
autobuffering unit (ABU) operation in which the serial port interrupts are not generated with each word transferred
to prevent CPU’s ISR overheads.
SCLK
FS
DIN
DOUT
16-Bit DAC Data (Sample 1)
16-Bit ADC Data (Sample 1)
Slot Number 0
16-Bit DAC Data (Sample 2)
16-Bit ADC Data (Sample 2)
(Sample 3)
Data Frame
Figure 3–16. Standard Operation/Continuous Data Transfer Mode: Stand-Alone Timing
SCLK
FS
DIN/
DOUT
0
12
n–1
n–2
n–3
01
2
n–1
n–2
n–3
Master Slave
n–2
Slave
n–3
Slave
2
Slave
1
Slave
0
Master
Slave
n–2
Slave
n–3
Slave
2
Slave
1
Slave
0
Data Frame / Sample 1
NOTE: n is the total number of AIC13s in the cascade
16 SCLKs Per Time Slot
Data Frame / Sample 2
Slot
Number
Figure 3–17. Standard Operation/Continuous Data Transfer Mode: Master-Slave Cascade Timing
3.8.3
Turbo Operation (SCLK)
Setting TURBO = 1 (bit D7) in control register 2 enables the turbo mode that requires the following condition to be
met:
For master with SCLK as output, M
× N > #Devices × mode
Where:
M, N, and P are clock divider values defined in the control register 4.
#Device is the number of the device in cascade.
Mode is equal to 1 for continuous data transfer mode and 2 for programming mode.
For slave, SCLK is the input with maximum allowable speed of 25 MHz (no condition is required)
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