
SLAS653 – FEBRUARY 2010
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Page 0 / Register 48 (0x30): INT1 Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset-insertion detect interrupt is not used in the generation of INT1 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT1 interrupt.
D6
R/W
0
0: Button-press detect interrupt is not used in the generation of INT1 interrupt.
1: Button-press detect interrupt is used in the generation of INT1 interrupt.
D5
R/W
0
0: DAC DRC signal-power interrupt is not used in the generation of INT1 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT1 interrupt.
D4
R/W
0
0: ADC AGC noise interrupt is not used in the generation of INT1 interrupt.
1: ADC AGC noise interrupt is used in the generation of INT1 interrupt.
D3
R/W
0
0: Short-circuit interrupt is not used in the generation of INT1 interrupt.
1: Short-circuit interrupt is used in the generation of INT1 interrupt.
D2
R/W
0
0: Engine-generated interrupt is not used in the generation of INT1 interrupt.
1: Engine-generated interrupt is used in the generation of INT1 interrupt.
D1
R/W
0
0: DC measurement using delta-sigma audio ADC data-available interrupt is not used in the generation
of INT1 interrupt.
1: DC measurement using delta-sigma audio ADC data-available interrupt is used in the generation of
INT1 interrupt.
D0
R/W
0
0: INT1 is only one pulse (active-high) of typical 2-ms duration.
1: INT1 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
Page 0 / Register 49 (0x31): INT2 Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset-insertion detect interrupt is not used in the generation of INT2 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT2 interrupt.
D6
R/W
0
0: Button-press detect interrupt is not used in the generation of INT2 interrupt.
1: Button-press detect interrupt is used in the generation of INT2 interrupt.
D5
R/W
0
0: DAC DRC signal-power interrupt is not used in the generation of INT2 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT2 interrupt.
D4
R/W
0
0: ADC AGC noise interrupt is not used in the generation of INT2 interrupt.
1: ADC AGC noise interrupt is used in the generation of INT2 interrupt.
D3
R/W
0
0: Short-circuit interrupt is not used in the generation of INT2 interrupt.
1: Short-circuit interrupt is used in the generation of INT2 interrupt.
D2
R/W
0
0: Engine-generated interrupt is not used in the generation of INT2 interrupt.
1: Engine-generated interrupt is used in the generation of INT2 interrupt.
D1
R/W
0
0: DC measurement using delta-sigma audio ADC data-available interrupt is not used in the generation
of INT2 interrupt.
1: DC measurement using delta-sigma audio ADC data-available interrupt is used in the generation of
INT2 interrupt.
D0
R/W
0
0: INT2 is only one pulse (active-high) of typical 2-ms duration.
1: INT2 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
Page 0 / Register 50 (0x32): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
0000 0000
Reserved. Write only reset values.
90
REGISTER MAP
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