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參數(shù)資料
型號(hào)： TLV320AIC36IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, PLASTIC, VFBGA-80
文件頁數(shù)： 17/168頁
文件大小： 1452K
代理商： TLV320AIC36IZQER
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
(continued)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D3–D0
R/W
0000
Left Channel AGC Signal Debounce Time Setting
0001: Left Channel AGC Signal Debounce Time = 0
0010: Left Channel AGC Signal Debounce Time = 4 ADC Word Clocks
0011: Left Channel AGC Signal Debounce Time = 8 ADC Word Clocks
…
1001: Left Channel AGC Signal Debounce Time = 1024 ADC Word Clocks
1010: Left Channel AGC Signal Debounce Time = 2048 ADC Word Clocks
1011: Left Channel AGC Signal Debounce Time = 2*2048 ADC Word Clocks
1100: Left Channel AGC Signal Debounce Time = 3*2048 ADC Word Clocks
1101: Left Channel AGC Signal Debounce Time = 4*2048 ADC Word Clocks
1110: Left Channel AGC Signal Debounce Time = 5*2048 ADC Word Clocks
1111: Left Channel AGC Signal Debounce Time = 6*2048 ADC Word Clocks
6.2.90 Page 0 / Register 93:
Left Channel AGC Control Register 8
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R
0000 0000
Left Channel AGC Gain Flag
1111 0100: Left Channel AGC Gain = -12.0 dB
1111 0101: Left Channel AGC Gain = -11.5 dB
1111 0110: Left Channel AGC Gain = -11.0 dB
…
0000 0000: Left Channel AGC Gain = 0.0 dB
…
0111 0010: Left Channel AGC Gain = 57.0 dB
0111 0011: Left Channel AGC Gain = 57.5 dB
0111 0100: Left Channel AGC Gain = 58.0 dB
6.2.91 Page 0 / Register 94:
Right Channel AGC Control Register 1
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Right Channel AGC Disabled
1: Right Channel AGC Enabled
D6–D4
R/W
000
Right Channel AGC Target Level Setting
000: Right Channel AGC Target Level = -5.5 dBFS
001: Right Channel AGC Target Level = -8.0 dBFS
010: Right Channel AGC Target Level = -10.0 dBFS
011: Right Channel AGC Target Level = -12.0 dBFS
100: Right Channel AGC Target Level = -14.0 dBFS
101: Right Channel AGC Target Level = -17.0 dBFS
110: Right Channel AGC Target Level = -20.0 dBFS
111: Right Channel AGC Target Level = -24.0 dBFS
D3–D0
R
0000
Reserved. Write only default values
6.2.92 Page 0 / Register 95:
Right Channel AGC Control Register 2
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
Right Channel AGC Hysteresis Setting
00: Right Channel AGC Hysteresis is 1.0 dB
01: Right Channel AGC Hysteresis is 2.0 dB
10: Right Channel AGC Hysteresis is 4.0 dB
11: Right Channel AGC Hysteresis is disabled
Copyright 2009–2010, Texas Instruments Incorporated
REGISTER MAP
113
Product Folder Link(s): TLV320AIC36
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