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參數資料
型號: TLV5613IPWRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, TSSOP-20
文件頁數: 4/23頁
文件大小: 447K
代理商: TLV5613IPWRG4
TLV5613
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS174B – DECEMBER 1997 – REVISED NOVEMBER 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
It is also possible to program the different modes (fast, slow, power down) and the DAC update latch using the
control register. The following tables list the possible combination of the control signals and control bits.
PIN
BIT
MODE
SPD
MODE
0
Slow
0
1
Fast
1
0
Fast
1
Fast
PIN
BIT
POWER
PWD
POWER
0
Down
0
1
Down
1
0
Normal
1
Down
PIN
BIT
LATCH
LDAC
RLDAC
LATCH
0
Transparent
0
1
Transparent
1
0
Hold
1
Transparent
data format
The TLV5613 writes data either to one of the DAC holding latches or to the control register depending on the
address bits A1 and A0.
ADDRESS BITS
A1
A0
REGISTER
0
DAC LSW holding
0
1
DAC MSW holding
1
0
Reserved
1
Control
D7
D6
D5
D4
D3
D2
D1
D0
X
RLDAC
PWD
SPD
X: Don’t care
SPD: Speed control bit
1
→ fast mode
0
→ slow mode
PWD: Power control bit
1
→ power down
0
→ normal operation
RLDAC: Load DAC latch
1
→ latch transparent
0
→ DAC latch controlled by LDAC pin
相關PDF資料
PDF描述
TLV5613CDW PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613CPWR PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613IPW PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613CPW PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613CDWR PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
相關代理商/技術參數
參數描述
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