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參數資料
| 型號： | TLV5625IDR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 3 us SETTLING TIME, 8-BIT DAC, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數： | 9/15頁 |
| 文件大小： | 212K |
| 代理商： | TLV5625IDR |
TLV5625
2.7V TO 5.5V LOW POWER DUAL 8BIT DIGITALTOANALOG
CONVERTER WITH POWER DOWN
SLAS233D JULY 1999 REVISED JULY 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (VDD to AGND)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range
0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: TLV5625C
0
°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5625I
40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VDD
VDD = 5 V
4.5
5
5.5
V
Supply voltage, VDD
VDD = 3 V
2.7
3
3.3
V
Power on reset, POR
0.55
2
V
High-level digital input voltage, VIH
VDD = 2.7 V
2
V
High-level digital input voltage, VIH
VDD = 5.5 V
2.4
V
Low-level digital input voltage, VIL
VDD = 2.7 V
0.6
V
Low-level digital input voltage, VIL
VDD = 5.5 V
1
V
Reference voltage, Vref to REF terminal
VDD = 5 V (see Note 1)
AGND
2.048
VDD 1.5
V
Reference voltage, Vref to REF terminal
VDD = 3 V (see Note 1)
AGND
1.024
VDD 1.5
V
Load resistance, RL
2
k
Load capacitance, CL
100
pF
Clock frequency, fCLK
20
MHz
Operating free-air temperature, TA
TLV5625C
0
70
°C
Operating free-air temperature, TA
TLV5625I
40
85
°C
NOTE 1: Due to the x2 output buffer, a reference input voltage
≥ (VDD0.4 V)/2 causes clipping of the transfer function.
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