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參數資料
| 型號： | TLV5636CDGK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封裝： | GREEN, PLASTIC, MSOP-8 |
| 文件頁數： | 5/23頁 |
| 文件大小： | 521K |
| 代理商： | TLV5636CDGK |
www.ti.com
EXAMPLE:
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
The meaning of the 12 data bits depends on the selected register. For the DAC register, the 12 data bits
determine the new DAC output value:
Data Bits: DAC
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
New DAC value
If the control register is selected, then D1, D0 of the 12 data bits are used to program the reference voltage:
Data Bits: CONTROL
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X(1)
X
REF1
REF0
(1)
X = don't care
REF1 and REF0 determine the reference source. If internal reference is selected, REF1 and REF0 determine the
reference voltage.
Reference Bits
REF1
REF0
REFERENCE
0
External
0
1
1.024 V
1
0
2.048 V
1
External
CAUTION:
If external reference voltage is applied to the REF pin, external reference MUST
be selected.
Set DAC output, select fast mode, select internal reference at 2.048 V:
Set reference voltage to 2.048 V (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
1
0
Write new DAC value and update DAC output:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
New DAC output value
The DAC output is updated on the rising clock edge after D0 is sampled.
To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL
register again.
13
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