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參數(shù)資料
型號: TLV5636CDGK
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO8
封裝: GREEN, PLASTIC, MSOP-8
文件頁數(shù): 6/23頁
文件大?。?/td> 521K
代理商: TLV5636CDGK
www.ti.com
LINEARITY, OFFSET, AND GAIN ERROR USING SINGLE END SUPPLIES
DAC Code
Output
Voltage
0 V
Negative
Offset
POWER-SUPPLY BYPASSING AND GROUND MANAGEMENT
0.1
F
Analog Ground Plane
1
2
3
4
8
7
6
5
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative. With
a positive offset, the output voltage changes on the first code change. With a negative offset, the output voltage
may not change with the first code, depending on the magnitude of the offset voltage.
The output amplifier attempts to drive the output to a negative voltage. However, because the most negative
supply rail is ground, the output cannot drive below ground and clamps the output at 0 V.
The output voltage then remains at zero until the input code value produces a sufficient positive output voltage to
overcome the negative offset voltage, resulting in the transfer function shown in Figure 15.
Figure 15. Effect of Negative Offset (Single Supply)
This offset error, not the linearity error, produces this breakpoint. The transfer function would have followed the
dotted line if the output buffer could drive below the ground rail.
For a DAC, linearity is measured between zero-input code (all inputs 0) and full-scale code (all inputs 1) after
offset and full scale are adjusted out or accounted for in some way. However, single supply operation does not
allow for adjustment when the offset is negative due to the breakpoint in the transfer function. So the linearity is
measured between full-scale code and the lowest code that produces a positive output voltage.
Printed-circuit boards that use separate analog and digital ground planes offer the best system performance.
Wire-wrap boards do not perform well and should not be used. The two ground planes should be connected
together at the low-impedance power-supply source. The best ground connection may be achieved by
connecting the DAC AGND terminal to the system analog ground plane, making sure that analog ground currents
are well managed and there are negligible voltage drops across the ground plane.
A 0.1-F ceramic-capacitor bypass should be connected between VDD and AGND and mounted with short leads
as close as possible to the device. Use of ferrite beads may further isolate the system analog supply from the
digital power supply.
Figure 16 shows the ground plane layout and bypassing technique.
Figure 16. Power-Supply Bypassing
14
相關(guān)PDF資料
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TLV5636ID SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO8
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