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參數(shù)資料
型號: TLV5637IDG4
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
封裝: GREEN, PLASTIC, MS-012AA, SOIC-8
文件頁數(shù): 5/21頁
文件大小: 422K
代理商: TLV5637IDG4
www.ti.com
LINEARITY, OFFSET, AND GAIN ERROR USING SINGLE ENDED SUPPLIES
DAC Code
Output
Voltage
0 V
Negative
Offset
SLAS224C – JUNE 1999 – REVISED JUNE 2007
When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative.
With a positive offset, the output voltage changes on the first code change. With a negative offset, the output
voltage may not change with the first code, depending on the magnitude of the offset voltage.
The output amplifier attempts to drive the output to a negative voltage. However, because the most negative
supply rail is ground, the output cannot drive below ground and clamps the output at 0V.
The output voltage then remains at zero until the input code value produces a sufficiently positive output voltage
to overcome the negative offset voltage, resulting in the transfer function shown in Figure 14.
Figure 14. Effect of Negative Offset (Single Supply)
This offset error, not the linearity error, produces this breakpoint. The transfer function would have followed the
dotted line if the output buffer could drive below the ground rail.
For a DAC, linearity is measured between zero-input code (all inputs 0) and full-scale code (all inputs 1) after
offset and full scale are adjusted out or accounted for in some way. However, single supply operation does not
allow for adjustment when the offset is negative due to the breakpoint in the transfer function. So the linearity is
measured between full-scale code and the lowest code that produces a positive output voltage.
13
相關(guān)PDF資料
PDF描述
TLV5638QDREP SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO8
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TLV5639CDWRG4 PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639IDWRG4 PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
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