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參數(shù)資料
型號： TMP320F2810PBKAEP
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Digital Signal Processors
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 46/103頁
文件大小： 1341K
代理商： TMP320F2810PBKAEP
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
–
APRIL 2001
–
REVISED SEPTEMBER 2001
46
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
system control (continued)
The PCLKCR1 and PCLKCR2 registers basically enable/disable clocks to the various peripheral modules in
the F2810 and F2812 devices. Table 32 lists the bit descriptions of the PCLKCR1 and PCLKCR2 registers.
Table 32. PCLKCR Register Bit Definitions
BIT(S)
NAME
TYPE
RESET
DESCRIPTION
0
EVAENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the EV-A
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
1
EVBENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the EV-B
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
2
reserved
R=0
0
reserved
3
ADCENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the ADC
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
7:4
reserved
R=0
0:0
8
SPIAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SPI
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
9
reserved
R=0
0
reserved
10
SCIAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SCI-A
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
11
SCIBENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SCI-B
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
12
MAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the
McBSP peripheral. For low power operation, this bit is set to zero by the
user or by reset.
13
reserved
R=0
0
reserved
14
HECCAENCLK
R/W
0
If this bit is set, it enables the system clock within the CAN peripheral. For
low power operation, this bit is set to zero by the user or by reset.
15
reserved
R=0
0
reserved
If a peripheral block is not used, then the clock to that peripheral can be turned off to minimize power consumption.
P
相關(guān)PDF資料
PDF描述
TMX320F2810PBKS DIGITAL SIGNAL PROCESSORS
TMP320F2810PBKS DIGITAL SIGNAL PROCESSORS
TMP320F2810GHHA DIGITAL SIGNAL PROCESSORS
TMX320F2810GHHMEP Digital Signal Processors
TMP320F2810GHHMEP Digital Signal Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP320F2810PBKS 功能描述:IC DSP W/FLASH128=LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:TMS320F281x, C2000™ 產(chǎn)品培訓(xùn)模塊:XLP Deep Sleep Mode 8-bit PIC® Microcontroller Portfolio 標(biāo)準(zhǔn)包裝:22 系列:PIC® XLP™ 18F 核心處理器:PIC 芯體尺寸:8-位 速度:48MHz 連通性:I²C，SPI，UART/USART，USB 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):14 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:256 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:20-DIP（0.300"，7.62mm） 包裝:管件 產(chǎn)品目錄頁面:642 (CN2011-ZH PDF) 配用:DV164126-ND - KIT DEVELOPMENT USB W/PICKIT 2DM164127-ND - KIT DEVELOPMENT USB 18F14/13K50AC164112-ND - VOLTAGE LIMITER MPLAB ICD2 VPP
TMP320F2810PGFA 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS
TMP320F2810PGFAEP 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processors
TMP320F2810PGFS 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS
TMP320F2811GHHA 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS320R2811, TMS320R2812 Digital Signal Processors
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