
MULTI-BYTE READY
SLOS544 – JULY 2008....................................................................................................................................................................................................... www.ti.com
A multiple-byte data read transfer is identical to a single-byte read transfer except that multiple data bytes are
transmitted by the TPA2050D4 to the master device as shown in
Figure 47. With the exception of the last data
byte, the master device responds with an acknowledge bit after receiving each data byte.
Figure 47. Multi-Byte Read Transfer
REGISTER MAPS
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1
Reserved
PAL_Fault
PAR_Fault
HPL_Fault
HPR_Fault
Thermal
2
Reserved
SWS
HPL_Enable
HPR_Enable
PA_Enable
Reserved
3
LIM_Lock
Reserved
Mode[2]
Mode[1]
Mode[0]
4
Reserved
5
Reserved
ST1_Vol[4]
ST1_Vol[3]
ST1_Vol[2]
ST1_Vol[1]
ST1_Vol[0]
6
Reserved
ST2_Vol[4]
ST2_Vol[3]
ST2_Vol[2]
ST2_Vol[1]
ST2_Vol[0]
7
Reserved
HP_Vout[2]
HP_Vout[1]
HP_Vout[0]
HP_Gain[1]
HP_Gain[0]
The TPA2050D4 I2C address is 0xE0 (binary 11100000) for writing and 0xE1 (binary 11100001) for reading.
Refer to the General I2C Operation section for more details.
Bits labeled Reserved are reserved for future enhancements. They may not be written to as it may change the
function of the device. If read, these bits may assume any value.
Any register above address 0x07 is reserved for testing and should not be written to because it may change the
function of the device. If read, these bits may assume any value.
Fault Register (Address: 1)
BIT
7
6
5
4
3
2
1
0
Function
Reserved
PAL_Fault
PAR_Fault
HPL_Fault
HPR_Fault
Thermal
Reset Value
0
Reserved
These bits are reserved for future enhancements. They will not change state if programmed. If
read these bits may assume any value.
PAL_Fault
Logic high indicates an over-current event has occurred on the Class-D left channel output. This
bit is clear-on-write. Only logic low can be written to this bit.
PAR_Fault
Logic high indicates an over-current event has occurred on the Class-D right channel output.
This bit is clear-on-write. Only logic low can be written to this bit.
HPL_Fault
Logic high indicates an over-current event has occurred on the headphone left channel output.
This bit is clear-on-write. Only logic low can be written to this bit.
HPR_Fault
Logic high indicates an over-current event has occurred on the headphone right channel output.
This bit is clear-on-write. Only logic low can be written to this bit.
Thermal
Logic high indicates thermal shutdown activated. Bit automatically clears when the thermal
condition lowers past the hysteresis threshold.
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Copyright 2008, Texas Instruments Incorporated