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FULLY DIFFERENTIAL AMPLIFIER
fc +
1
2pR
L
C
(5)
V(LRMS)
VO
IDD
IDD(avg)
RL
CC
VO(PP)
VDD
–3 dB
fc
TPA6203A1
SLOS364D – MARCH 2002 – REVISED JULY 2005
In a typical wireless handset operating at 3.6 V,
Increasing power to the load does carry a penalty of
bridging raises the power into an 8-
speaker from a
increased internal power dissipation. The increased
singled-ended (SE, ground reference) limit of 200
dissipation is understandable considering that the
mW to 800 mW. In sound power that is a 6-dB
BTL configuration produces 4
× the output power of
improvement—which is loudness that can be heard.
the SE configuration.
In addition to increased power there are frequency
response concerns. Consider the single-supply SE
configuration shown in
Figure 32. A coupling capaci-
EFFICIENCY AND THERMAL INFORMATION
tor is required to block the dc offset voltage from
Class-AB amplifiers are inefficient. The primary cause
reaching the load. This capacitor can be quite large
of these inefficiencies is voltage drop across the
(approximately 33
F to 1000 F) so it tends to be
output stage transistors. There are two components
expensive, heavy, occupy valuable PCB area, and
of the internal voltage drop. One is the headroom or
have
the
additional
drawback
of
limiting
dc voltage drop that varies inversely to output power.
low-frequency performance of the system. This fre-
The second component is due to the sinewave nature
quency-limiting effect is due to the high pass filter
of the output. The total voltage drop can be calcu-
network created with the speaker impedance and the
lated by subtracting the RMS value of the output
coupling
capacitance
and
is
calculated
with
voltage from VDD. The internal voltage drop multiplied
Equation 5.
by the average value of the supply current, IDD(avg),
determines the internal power dissipation of the
amplifier.
An easy-to-use equation to calculate efficiency starts
For example, a 68-
F capacitor with an 8- speaker
out as being equal to the ratio of power from the
would attenuate low frequencies below 293 Hz. The
power supply to the power delivered to the load. To
BTL configuration cancels the dc offsets, which elim-
accurately calculate the RMS and average values of
inates
the
need
for
the
blocking
capacitors.
power in the load and in the amplifier, the current and
Low-frequency performance is then limited only by
voltage waveform shapes must first be understood
the input network and speaker response. Cost and
PCB space are also minimized by eliminating the
bulky coupling capacitor.
Figure 33. Voltage and Current Waveforms for
BTL Amplifiers
Although the voltages and currents for SE and BTL
are sinusoidal in the load, currents from the supply
are very different between SE and BTL configur-
ations. In an SE application the current waveform is a
half-wave rectified shape, whereas in BTL it is a
full-wave rectified waveform. This means RMS con-
version factors are different. Keep in mind that for
most of the waveform both the push and pull transis-
Figure 32. Single-Ended Output and Frequency
tors are not on at the same time, which supports the
Response
fact that each amplifier in the BTL device only draws
current from the supply for half the waveform. The
following equations are the basis for calculating
amplifier efficiency.
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