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參數(shù)資料
| 型號： | TPS40054QPWPRQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | PLASTIC, HTSSOP-16 |
| 文件頁數(shù)： | 7/28頁 |
| 文件大小： | 571K |
| 代理商： | TPS40054QPWPRQ1 |
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t
START w 2
p
L
C
O
(seconds)
(13)
C
SS +
2.3 mA
0.7 V
t
START
(Farads)
(14)
PROGRAMMING CURRENT LIMIT
I
LIM +
C
O
V
O
t
START
) IL (Amperes)
(15)
UDG02136
HDRV
CLOCK
VVINVSW
SS
7 CURRENT LIMIT TRIPS
(HDRV CYCLE TERMINATED BY CURRENT LIMIT TRIP)
7 SOFT-START CYCLES
VILIM
tBLANKING
TPS40054-Q1, TPS40055-Q1, TPS40057-Q1
SLAS482A – AUGUST 2005 – REVISED NOVEMBER 2005
APPLICATION INFORMATION (continued)
There is a direct correlation between tSTART and the input current required during start-up. The faster tSTART, the
higher the input current required during start-up. This relationship is describe in more detail in the section titled,
Programming the Current Limit which follows. The soft-start capacitance, CSS, is described in Equation 14.
For applications in which the VIN supply ramps up slowly, (typically between 50 ms and 100 ms) it may be
necessary to increase the soft-start time to between approximately 2 ms and 5 ms to prevent nuisance UVLO
tripping. The soft-start time should be longer than the time that the VIN supply transitions between 6 V and 7 V.
The TPS4005x uses a two-tier approach for overcurrent protection. The first tier is a pulse-by-pulse protection
scheme. Current limit is implemented on the high-side MOSFET by sensing the voltage drop across the
MOSFET when the gate is driven high. The MOSFET voltage is compared to the voltage dropped across a
resistor connected from VIN pin to the ILIM pin when driven by a constant current sink. If the voltage drop across
the MOSFET exceeds the voltage drop across the ILIM resistor, the switching pulse is immediately terminated.
The MOSFET remains off until the next switching cycle is initiated.
The second tier consists of a fault counter. The fault counter is incremented on an overcurrent pulse and
decremented on a clock cycle without an overcurrent pulse. When the counter reaches seven, a restart is issued
and seven soft-start cycles are initiated. Both the upper and lower MOSFETs are turned off during this period.
The counter is decremented on each soft-start cycle. When the counter is decremented to zero, the PWM is
re-enabled. If the fault has been removed the output starts up normally. If the output is still present, the counter
counts seven overcurrent pulses and re-enters the second-tier fault mode. See Figure 10 for typical overcurrent
protection waveforms.
The minimum current limit setpoint (ILIM) depends on tSTART, CO, VO, and the load current at turn-on (IL).
Figure 10. Typical Current Limit Protection Waveforms
15
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