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參數資料
型號: TPS40055QPWPRQ1
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩壓器
英文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16
封裝: PLASTIC, HTSSOP-16
文件頁數: 15/28頁
文件大?。?/td> 571K
代理商: TPS40055QPWPRQ1
www.ti.com
Thermal Pad
6,60 mm
6,20 mm
4,50 mm
4,30 mm
8
1
2,31 mm
1,75 mm
5,10 mm
4,90 mm
2,46 mm
1,86 mm
MOSFET PACKAGING
GROUNDING AND CIRCUIT LAYOUT CONSIDERATIONS
TPS40054-Q1, TPS40055-Q1, TPS40057-Q1
SLAS482A – AUGUST 2005 – REVISED NOVEMBER 2005
LAYOUT CONSIDERATIONS (continued)
plugged when the copper plating is performed, then a solder mask material should be used to cap the vias with a
diameter equal to the via diameter of 0,1 mm minimum. This capping prevents the solder from being wicked
through the thermal vias and potentially creating a solder void under the package. See the PowerPAD Thermally
Enhanced Package[2] and the mechanical illustration at the end of this document for more information on the
PowerPAD package.
Figure 16. PowerPAD Dimensions
MOSFET package selection depends on MOSFET power dissipation and the projected operating conditions. In
general, for a surface-mount applications, the DPAK style package provides the lowest thermal impedance (
θ
JA)
and, therefore, the highest power dissipation capability. However, the effectiveness of the DPAK depends on
proper layout and thermal management. The
θ
JA specified in the MOSFET data sheet refers to a given copper
area and thickness. In most cases, a lowest thermal impedance of 40
°C/W requires one square inch of 2-ounce
copper on a G-10/FR-4 board. Lower thermal impedances can be achieved at the expense of board area. See
the selected MOSFET's data sheet for more information regarding proper mounting.
The TPS4005x provides separate signal ground (SGND) and power ground (PGND) pins. It is important that
circuit grounds are properly separated. Each ground should consist of a plane to minimize its impedance if
possible. The high power noisy circuits such as the output, synchronous rectifier, MOSFET driver decoupling
capacitor (BP10), and the input capacitor should be connected to PGND plane at the input capacitor.
Sensitive nodes such as the FB resistor divider RT) and ILIM should be connected to the SGND plane. The
SGND plane should only make a single point connection to the PGND plane.
Component placement should ensure that bypass capacitors (BP10 and BP5) are located as close as possible to
their respective power and ground pins. Also, sensitive circuits such as FB, RT, and ILIM should not be located
near high dv/dt nodes such as HDRV, LDRV, BOOST, and the switch node (SW).
22
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相關代理商/技術參數
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TPS40056PWPG4 功能描述:DC/DC 開關控制器 Wide Vin Synch Buck DC/DC Cntrlr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK
TPS40056PWPR 功能描述:DC/DC 開關控制器 Wide Vin Synch Buck DC/DC Contr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK
TPS40056PWPRG4 功能描述:DC/DC 開關控制器 Wide Vin Synch Buck DC/DC Contr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK
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