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參數(shù)資料
| 型號： | TPS5110PW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | GREEN, PLASTIC, TSSOP-24 |
| 文件頁數(shù)： | 2/43頁 |
| 文件大小： | 813K |
| 代理商： | TPS5110PW |
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TPS5110
SLVS025B APRIL 2002 REVISED JULY 2004
10
www.ti.com
DETAILED DESCRIPTION
OCP for the LDO
To achieve the LDO current limit, a sense resistor must be placed in series with the N-channel MOSFET drain,
connected between the LDO_IN and LDO_CUR pins (see reference schematic). If the voltage drop across this
sense resistor exceeds 50 mV, the output voltage is reduced to approximately 22% of the nominal value, thus
activates UVP to start the FLT latch timer. When the time is up, the LDO_GATE pin is pulled LOW to makes the
LDO regulator shutdown. Note that the SBRC is also latched OFF at the same time since the LDO and the SBRC
share the same FLT capacitor.
overvoltage protection
For over voltage protection (OVP), the TPS5110 monitors the INV and INV_LDO pin voltages. When the INV
or INV_LDO pin voltage is higher than 0.95 V (0.85 V +12%), the OVP comparator output goes low and the FLT
timer starts to charge an external capacitor connected to FLT pin. After a set time, the FLT circuit latches the
high-side and low-side MOSFET drivers and the LDO. The latched state of each block is summarized in Table 2.
The timer-source current for the OVP latch is 125
A(typ.), and the time-up voltage is 1.185 V (typ.). The OVP
timer is designed to be 50 times faster than the undervoltage protection timer described below.
Table 2. Overvoltage Protection Logic
OVP OCCURS AT
HIGH-SIDE
MOSFET DRIVER
LOW-SIDE
MOSFET DRIVER
LDO
SBRC
OFF
ON
OFF
LDO
OFF
undervoltage protection
For under voltage protection (UVP), the TPS5110 monitors the INV and INV_LDO pin voltages. When the INV
or INV_LDO pin voltage is lower than 0.55 V (0.85 V 35 %), the UVP comparator output goes low, and the
FLT timer starts to charge the external capacitor connected to FLT pin. Also, when the current comparator
triggers the OCP, the UVP comparator detects the under-voltage output and starts the FLT capacitor charge,
too. After a set time, the FLT circuit latches all of the MOSFET drivers to the OFF state. The timer-latch source
current for UVP is 2.3
A (typ.), and the time-up voltage is also 1.185 V (typ.). The UVP function of the LDO
controller is disabled when voltage across the pass transistor is less than 0.23 V (typ.).
FLT
When an OVP or UVP comparator output goes low, the FLT circuit starts to charge the FLT capacitor. If the FLT
pin voltage goes beyond a constant level, the TPS5110 latches the MOSFET drivers. At this time, the state of
MOSFET is different depending on the OVP alert and the UVP alert, see Table 2. The enable time used to latch
the MOSFET drivers is decided by the value of the FLT capacitor. The charging constant current value depends
on whether it is an OVP alert or a UVP alert as shown in the following equation:
FLTsource current (OVP)
+ FLTsource current (UVP)
50
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TPS5110PWG4 | 功能描述:DC/DC 開關控制器 Sync Buck w/NMOS LDO Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
| TPS5110PWR | 功能描述:DC/DC 開關控制器 Sync Buck w/NMOS LDO Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
| TPS5110PWRG4 | 功能描述:DC/DC 開關控制器 Sync Buck w/NMOS LDO Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
| TPS51113 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SYNCHRONOUS BUCK CONTROLLER WITH HIGH-CURRENT GATE DRIVER |
| TPS51113DRCR | 功能描述:DC/DC 開關控制器 4.5-13.2V Synch Buck Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
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