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參數資料
| 型號： | TPS51206DSQT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | SWITCHING REGULATOR, PDSO10 |
| 封裝： | 2 X 2 MM, GREEN, PLASTIC, SON-10 |
| 文件頁數： | 2/23頁 |
| 文件大小： | 603K |
| 代理商： | TPS51206DSQT |
SLUSAH1
– MAY 2011
DETAILED DESCRIPTION
VTT SINK/SOURCE REGULATOR
The TPS51206 is a sink/source tracking termination regulator specifically designed for low input voltage, low
cost, and low external component count systems where space is a key application parameter. The TPS51206
integrates a high-performance, low-dropout (LDO) linear regulator (VTT) that has ultimate fast response to track
VDDQSNS within 40 mV at all conditions, and its current capability is 2 A for both sink and source directions.
A 10-
F (or greater) ceramic capacitor(s) need to be attached close to the VTT terminal for stable operation; X5R
or better grade is recommended. To achieve tight regulation with minimum effect of trace resistance, the remote
sensing terminal, VTTSNS, should be connected to the positive terminal of the output capacitor(s) as a separate
trace from the high current path from the VTT pin.
The TPS51206 has a dedicated pin, VLDOIN, for VTT power supply to minimize the LDO power dissipation on
user application. The minimum VLDOIN voltage is 0.4 V above the
VDDQSNS voltage.
VTTREF
The VTTREF pin includes 10 mA of sink/source current capability, and tracks
of VDDQSNS with ±1%
accuracy. A 0.22-
F ceramic capacitor needs to be attached close to the VTTREF terminal for stable operation;
X5R or better grade is recommended.
POWER STATE CONTROL
The TPS51206 has two input pins, S3 and S5, to provide simple control of the power state. Table 1 describes
S3/S5 terminal logic state and corresponding state of VTTREF/VTT outputs. VTT is turn-off and placed to high
impedance (High-Z) state in S3. The VTT output is floated and does not sink or source current in this state.
When both S5 and S3 pins are LOW, the power state is set to S4/S5. In S4/S5 state, all the outputs are turn-off
and discharged to GND.
Table 1. S3 and S5 Control Table
STATE
S3
S5
VTTREF
VTT
S0
HI
ON
S3
LO
HI
ON
OFF(High-Z)
S4/S5
LO
OFF(Discharge)
VDD UNDERVOLTAGE LOCKOUT PROTECTION
The TPS51206 input voltage (VDD) includes undervoltage lockout protection (UVLO). When the VDD pin voltage
is lower than UVLO threshold voltage, VTT and VTTREF are shut off. This is non-latch protection.
OVER-TEMPERATURE PROTECTION
This device features internal temperature monitoring. If the temperature exceeds the threshold value, VTT and
VTTREF are shut off. This is a non-latch protection.
10
Copyright
2011, Texas Instruments Incorporated
Product Folder Link(s): TPS51206
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