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參數資料
| 型號： | TPS53114PWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | SWITCHING CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁數： | 24/27頁 |
| 文件大小： | 912K |
| 代理商： | TPS53114PWR |
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VBST
SS
EN
VO
VFB
GND
CER
DRVH
SW
DRVL
PGND
TRIP
VIN
VREG5
V5FILT
FSEL
16
1
2
3
4
5
6
7
8
10
11
12
13
14
T
P
S
5
3
1
4
15
9
VBST
SS
EN
VO
VFB
GND
CER
DRVH
SW
DRVL
PGND
TRIP
VIN
VREG5
V5FILT
FSEL
16
1
2
3
4
5
6
7
8
10
11
12
13
14
T
P
S
5
3
1
4
15
9
SLVS887B – APRIL 2009 – REVISED OCTOBER 2010
www.ti.com
PIN FUNCTIONS
PIN
I/O
DESCRIPTION
NAME
NO.
Supply input for high-side NFET driver. Bypass to SW with a high-quality 0.1-mF ceramic capacitor. An external
VBST
16
I
schottky diode can be added from VREG5 if forward drop is critical to drive the high-side FET.
EN
7
I
Enable. Pull High to enable SMPS.
SS
3
O
Soft start programming pin. Connect capacitor from SS pin to GND to program soft start time.
VO
1
I
Output voltage input for on-time adjustment and output discharge. Connect directory to the output voltage.
VFB
2
I
D-CAP2 feedback input. Connect to output voltage with resistor divider.
GND
4
I
Signal ground pin. Connect to PGND and system ground at a single point.
High-side N-channel MOSFET gate driver output. SW referenced driver switches between SW(OFF) and
DRVH
15
O
VBST(ON).
SW
14
I/O
Switch node connections for both the high-side driver and over current comparator.
DRVL
13
O
Low-side N-Channel MOSFET gate driver output. PGND referenced driver switches between PGND(OFF) and
VREG5(ON).
Power ground connection for both the low-side driver and over current comparator. Connect PGND and GND
PGND
12
I/O
strongly together near the IC.
over current threshold programming pin. Connect to GND with a resister to set threshold for low-side RDS(on)
TRIP
11
I
current limit.
VIN
9
I
Supply Input for 5-V linear regulator. Bypass to GND with a minimum high-quality 0.1-mF ceramic capacitor.
5-V supply input for the control circuitry except the MOSFET drivers. Bypass to GND with a minimum
V5FILT
8
I
high-quality 1.0-mF ceramic capacitor. V5FILT is connected to VREG5 via internal 10- resistor.
VREG5
10
O
Output of 5-V linear regulator and supply for MOSFET driver. Bypass to GND with a minimum high-quality
4.7-mF ceramic capacitor. VREG5 is connected to V5FILT via internal 10- resistor.
Output capacitor select pin. Connect to GND for ceramic output capacitors. Connect to V5FILT for conductive
CER
5
I
polymer electrolyte type output capacitors (SP-CAP, POS-CAP, PXE).
Switching frequency selection pin. Connect to GND for low switching frequency or connect to V5FILT for high
FSEL
6
I
switching frequency.
PIN ASSIGNMENT (TOP VIEW)
Figure 3. HTSSOP 16-Pin PWP
Figure 4. TSSOP 16-Pin PW
6
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s) :TPS53114
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