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參數資料
| 型號： | TPS54615MPWPREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 12 A SWITCHING REGULATOR, 700 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | PLASTIC, HTSSOP-28 |
| 文件頁數： | 15/21頁 |
| 文件大小： | 650K |
| 代理商： | TPS54615MPWPREP |
www.ti.com
ABSOLUTE MAXIMUM RATINGS
TPS54611-EP, TPS54612-EP
TPS54613-EP, TPS54614-EP
TPS54615-EP, TPS54616-EP
SGLS293A – FEBRUARY 2005 – REVISED AUGUST 2005
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
NO.
Analog ground. Return for slow-start capacitor, VBIAS capacitor, RT resistor FSEL. Make PowerPAD connection to
AGND
1
AGND.
Bootstrap input. A 0.022-F to 0.1-F low-ESR capacitor connected from BOOT to PH generates a floating drive for
BOOT
5
the high-set FET driver.
NC
3
No connection
Power ground. High current return for the low-side driver and power MOSFET. Connect PGND with large copper
PGND
15–19
areas to the input and output supply returns and negative terminals of the input and output capacitors.
PH
6–14
Phase input/output. Junction of the internal high-side and low-side power MOSFETs, and output inductor.
Power good open drain output. High-Z when VSENSE
≥ 90% V
ref, otherwise PWRGD is low. Note that output is low
PWRGD
4
when SS/ENA is low or internal shutdown signal active.
RT
28
Frequency setting resistor input. Connect a resistor from RT to AGND to set the switching frequency.
Slow-start/enable input/output. Dual function pin which provides logic input to enable/disable device operation and
SS/ENA
26
capacitor input to externally set the start-up time.
FSEL
27
Frequency select input. Provides logic input to select between two internally set switching frequencies.
Internal bias regulator output. Supplies regulated voltage to internal circuitry. Bypass VBIAS pin to AGND pin with a
VBIAS
25
high quality, low-ESR 0.1-F to 1-F ceramic capacitor.
Input supply for the power MOSFET switches and internal bias regulator. Bypass VIN pins to PGND pins close to
VIN
20–24
device package with a high quality, low-ESR 1-F to 10-F ceramic capacitor.
VSENSE
2
Error amplifier inverting input. Connect directly to output voltage sense point.
over operating free-air temperature range (unless otherwise noted)(1)
VALUE / UNIT
VIN, SS/ENA, FSEL
–0.3 V to 7 V
RT
–0.3 V to 6 V
VI
Input voltage range
VSENSE
–0.3 V to 4 V
BOOT
–0.3 V to 17 V
VBIAS, PWRGD
–0.3 V to 7 V
VO
Output voltage range
PH
–0.6 V to 10 V
PH
Internally Limited
IO
Source current
VBIAS
6 mA
PH
12 A
IS
Sink current
SS/ENA, PWRGD
10 mA
Voltage differential
AGND to PGND
±0.3 V
Continuous power dissipation
See Power Dissipation Rating Table
TJ
Operating virtual junction temperature range
–55
°C to 150°C
Tstg
Storage temperature
–65
°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3
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