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參數(shù)資料
| 型號： | TPS5615CPWP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO28 |
| 封裝： | PLASTIC, TSSOP-28 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 387K |
| 代理商： | TPS5615CPWP |
TPS5615, TPS5618, TPS5625, TPS5633
SYNCHRONOUS-BUCK HYSTERETIC REGULATOR CONTROLLER
SLVS177A – SEPTEMBER 1998 – REVISED NOVEMBER 1998
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
Vref
The reference voltage section consists of a temperature-compensated bandgap reference and a resistive
divider that sets the output voltage option. The output voltage, VREF, is within 1% of the nominal setting over
the full junction temperature range of 0
°C to 125°C, and a VCC supply voltage range of 11.4 V to 12.6 V. The
output of the reference network is indirectly brought out through a buffer to the VREFB pin. The voltage on this
pin will be within 2% of VREF. It is not recommended to drive loads with VREFB, other than setting the hysteresis
of the hysteretic comparator, because the current drawn from VREFB sets the charging current for the slowstart
capacitor. Refer to the
slowstart section for additional information.
hysteretic comparator
The hysteretic comparator regulates the output voltage of the synchronous-buck converter. The hysteresis is
set by 2 external resistors and is centered on VREF. The 2 external resistors form a resistor divider from VREFB
to ANAGND, with the output voltage connecting to the VHYST pin. The hysteresis of the propagation delay from
the comparator inputs to the driver outputs is 250 ns (maximum). The maximum hysteresis setting is 60 mV.
R1
+
R2
V
H
2
VREFB–V
H
Where
VH = desired hysteresis voltage
IO(MAX) = 0.5 A
VHYST
TPS56xx
VREFB
R1
R2
+ 2
VREFB
* V
H
Figure 1. Setting the Hysteresis Voltage
low-side driver
The low-side driver is designed to drive low-Rds(on) n-channel MOSFETs. The current rating of the driver is 2
A, source or sink. The bias to the low-side driver is internally connected to the DRV regulator.
high-side driver
The high-side driver is designed to drive low-Rds(on) n-channel MOSFETs. The current rating of the driver is 2
A, source or sink. The high-side driver can be configured either as a ground-referenced driver or as a floating
bootstrap driver. When configured as a floating driver, the bias voltage to the driver is developed from the DRV
regulator. The internal bootstrap diode, connected between the DRV and BOOT pins, is a Schottky for improved
drive efficiency. The maximum voltage that can be applied between BOOT and DRVGND is 30 V. The driver
can be referenced to ground by connecting BOOTLO to DRVGND, and connecting BOOT to either DRV or VCC.
deadtime control
Deadtime control prevents shoot-through current from flowing through the main power FETs during switching
transitions by actively controlling the turn-on times of the MOSFET drivers. The high-side driver is not allowed
to turn on until the gate-drive voltage to the low-side FET is below 2 V; the low-side driver is not allowed to turn
on until the voltage at the junction of the 2 FETs (Vphase) is below 2 V.
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