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參數資料
| 型號： | TPS65182RGZR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 7 X 7 MM, 0.9 MM, PLASTIC, QFP-48 |
| 文件頁數： | 3/24頁 |
| 文件大?。?/td> | 865K |
| 代理商： | TPS65182RGZR |
www.ti.com
SLVSAA2C – MARCH 2010 – REVISED OCTOBER 2010
It is possible for the host to force the TPS65182/TPS65182B directly into SLEEP mode from ACTIVE mode by
de-asserting the WAKEUP pin in which case the device follows the pre-defined power-down sequence before
entering SLEEP mode.
DEPENDENCIES BETWEEN RAILS
Charge pumps, LDOs, and VCOM driver are dependent on the positive and inverting buck-boost converters and
several dependencies exist that affect the power-up sequencing. These dependencies are listed below.
1. Inverting buck-boost (DCDC2) must be in regulation before positive boost (DCDC1) can be enabled.
Internally, DCDC1 enable is gated by DCDC2 power good.
2. Positive boost (DCDC1) must be in regulation before LDO2 (VNEG) can be enabled. Internally LDO2 enable
is gated DCDC1 power-good.
3. Positive boost (DCDC1) must be in regulation before VCOM can be enabled; Internally VCOM enable is
gated by DCDC1 power good.
4. Positive boost (DCDC1) must be in regulation before negative charge pump (CP2) can be enabled. Internally
CP2 enable is gated by DCDC1 power good.
5. Positive boost (DCDC1) must be in regulation before positive charge pump (CP1) can be enabled. Internally
CP1 enable is gated by DCDC1 power good.
6. LDO2 must be in regulation before LDO1 can be enabled. Internally LDO1 enable is gated by LDO2 power
good.
7. The minimum delay time between any two PWRx pins must be > 62.5 s in order to follow the power up
sequence defined by GPIO control. If any two PWRx pins are pulled up together (< 62.5 s apart) rails will
be staggered in a manner that a subsequent rail’s enable is gated by PG of a preceding rail. In this case, the
default order of power-up is LDO2 (VNEG), CP2 (VEE), LDO1 (VPOS), and CP1(VDDH). If any two PWRx
pins are pulled low then all rails will go down at the same time.
Copyright 2010, Texas Instruments Incorporated
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TPS65182RGZT | 功能描述:LCD Gamma緩沖器 Pwr Mgt IC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 輸入補償電壓: 轉換速度: 電源電壓-最大:20 V 電源電壓-最小:9 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-38 封裝:Tube |
| TPS65185EVM | 功能描述:電源管理IC開發工具 TPS65185 Eval Mod RoHS:否 制造商:Maxim Integrated 產品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS65185RGZR | 功能描述:LCD Gamma緩沖器 PMIC for E-Ink Vizplex RoHS:否 制造商:Maxim Integrated 輸入補償電壓: 轉換速度: 電源電壓-最大:20 V 電源電壓-最小:9 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-38 封裝:Tube |
| TPS65185RGZT | 功能描述:LCD Gamma緩沖器 PMIC for E-Ink Vizplex RoHS:否 制造商:Maxim Integrated 輸入補償電壓: 轉換速度: 電源電壓-最大:20 V 電源電壓-最小:9 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-38 封裝:Tube |
| TPS65185RSLR | 功能描述:其他電源管理 PMIC FOR E-INK PAPER DISPLAY RoHS:否 制造商:Texas Instruments 輸出電壓范圍: 輸出電流:4 mA 輸入電壓范圍:3 V to 3.6 V 輸入電流: 功率耗散: 工作溫度范圍:- 40 C to + 110 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-48 封裝:Reel |
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