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參數資料
| 型號： | TPS65185RSLT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 0.4 MM PITCH, 0.9 MM HEIGHT, PLASTIC, VQFN-48 |
| 文件頁數： | 10/49頁 |
| 文件大小： | 2488K |
| 代理商： | TPS65185RSLT |
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PRODUCTPREVIEW
VIN
PWRUP
WAKEUP
VNEG
VEE
VPOS
VDDH
PWR_GOOD
VN
VB
1.8ms
(1)
DDLY 2
DDLY 3
DDLY 4
DDLY 1
300 us (max)
STANDBY
ACTIVE
SLEEP
ACTIVE
(1) Minimum delay time between WAKEUP rising edge and IC rady to accept I 2C transaction .
UDLY 2
UDLY 3
UDLY 1
UDLY 4
I2C
300 us (max)
UDLY 2
UDLY 1
UDLY 4
UDLY 3
Discharge Delay
SLVSAQ8A
– FEBRUARY 2011 – REVISED MAY 2011
In this example the first power-up sequence is started by pulling the PWRUP pin high (rising edge). Power-down is
initiated by pulling the WAKEUP pin low (device enters SLEEP mode). The 2nd power-up sequence is initiated by
pulling the WAKEUP pin high while the PWRUP pin is also high (power up from SLEEP to ACTIVE).
Figure 24. Power-Up and Power-Down Timing Diagram
SOFTSTART
TPS65185 supports soft-start for all rails, i.e. inrush current is limited during startup of DCDC1, DCDC2, LDO1,
LDO2, CP1 and CP2. If DCDC1 or DCDC2 are unable to reach power-good status within 50 ms, the
corresponding UV flag is set in the interrupt registers, the interrupt pin is pulled low, and the device enters
STANDBY mode. LDO1, LDO2, positive and negative charge pumps also have a 50-ms power-good time-out
limit. If either rail is unable to power up within 50 ms after it has been enabled, the corresponding UV flag is set
and the interrupt pin is pulled low. However, the device will remain in ACTIVE mode in this case.
ACTIVE DISCHARGE
TPS65185 provides low-impedance discharge paths for the display power rails (VEE, VNEG, VPOS, VDDH, and
VCOM) which are enabled whenever the corresponding rail is disabled. The discharge paths are connected to
the rails on the PCB which allows adding external resistors to customize the discharge time. However, external
resistors are not required.
Active discharge remains enabled for 100 ms after the last rail has been disabled (STROBE4 has been
executed). During this time the negative boost converter (VN) remains up. After the discharge delay, VN is shut
down and the device enters STANDBY or SLEEP mode, depending on the state of the WAKEUP pin.
18
Copyright
2011, Texas Instruments Incorporated
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| TPS65192RHDR | 功能描述:LCD 驅動器 9Ch Level Shifter for LCD Displays RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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