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參數(shù)資料
型號(hào)： TPU3040PQ
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
元件分類： 圖文
英文描述： TELETEXT DECODER, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 20/72頁(yè)
文件大小： 576K
代理商： TPU3040PQ
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
27
4.2. I2C Bus Interface
Communication between TPU 3040 and host controller
is done via I2C-bus. For detailed information on the I2C-
bus please refer to the Philips manual ‘I2C-bus Specifi-
cation’.
The TPU 3040 acts as a slave transmitter/receiver and
uses clock synchronization to slow down the data trans-
fer if necessary. General call address will not be ac-
knowledged.
Different memories and functions of TPU 3040 can be
accessed by subaddressing. The byte following the
slave address byte is defined as the subaddress byte.
Maximum length of an I2C telegram is 256 bytes follow-
ing slave address and subaddress byte. The interface
supports data transfer with autoincrement.
The I2C-bus interface is interrupt-driven and uses an in-
ternal 48-byte buffer to collect I2C data in real-time with-
out disturbing internal processes. This is done to avoid
clock synchronization as far as possible. When the TPU
3040 has to process the I2C buffer and the I2C telegram
has not yet been stopped, the I2C clock line will be held
down.
The time required to process the I2C buffer depends on
other processes running inside the TPU 3040 firmware.
Thus the following I2C telegram addressing the TPU can
be held after the slave address byte until the old tele-
gram is completely processed.
4.2.1. Subaddressing
Access to all memory locations and to the command in-
terface is achieved by subaddressing. Both the external
DRAM and the internal CPU memory can be addressed
completely. The TPU 3040 acknowledges 6 different
subaddresses following the slave address (see Table
4–2).
The following symbols are used to describe the I2C ex-
ample telegrams:
<
start condition
>
stop condition
ab
address bank byte
ah
address high byte
al
address low byte
cc
command byte
dd
data byte
ss
status byte
..
0 – n continuation bytes
Table 4–2: I2C-bus Subaddresses
Name
Binary Value
Hex Value
Mode
Function
TPU
0010 001x
22, 23
W, R
TPU slave address
Sub 1
0111 1000
78
W
subaddressing CPU (static)
Sub 2
0111 1001
79
W
subaddressing CPU (autoincrement)
Sub 3
0111 1010
7A
W
subaddressing DRAM (autoincrement)
Sub 4
0111 1011
7B
W
subaddressing command language
Data
0111 1100
7C
R/W
subaddressing data register
Status
0111 1101
7D
R
status register
bit 7 = command wait
bit 6 = command invalid
bit 5 = command found no data
bit 4 = not used
bit 3 = not used
bit 2 = not used
bit 1 = 0
bit 0 = 0
相關(guān)PDF資料
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