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參數資料
| 型號： | TQ5M34 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數： | 12/18頁 |
| 文件大小： | 207K |
| 代理商： | TQ5M34 |
TQ5M34
Data Sheet
12
For additional information and latest specifications, see our website:
www.triquint.com
A first approximation to the needed inductor can be found by
the following equation:
1
L = ---------------- - 1 nH where C=1.5pF
C (2*pi*F)
2
It is more than likely that when the design is prototyped, the
needed inductance will fall between two standard inductor
values. We advise using a slightly larger inductor and then
use the bypass cap (C5 fromFigure 2.) as fine tuning. When
using this method it is important to isolate the tuning
inductor/bypass cap node fromthe Vdd bus, since loading on
the Vdd bus can affect tuning. A resistor of 3.3ohmto 20ohm
has been found to work well for this purpose (R2).
Figure 5 shows the recommended test setup for tuning the
TQ5M34 LO buffer. A network analyzer is set to the center of
the LO band sweeping about +/- 300Mhz, with an output
power of –4dBm It is important to set the frequency range to
be quite a bit wider than the LO band, so that the shape of the
tuning curve can be seen. A two port calibration is performed
and the analyzer is set to monitor S21. Port 1 of the analyzer
is connected to the LO port of the TQ5M34, while Port 2 is
connected via cable to a short length of sem-rigid coaxial
probe. The center of the probe should protrude 1 to 2 mm
beyond the ground shield. The end of the probe with the
exposed center conductor is held close to the LO tuning
inductor.
GIC NETWORK DESIGN:
The GIC pin on the TQ5M34 is connected internally to the
source of the IF output stage. By adding one or two resistors
and a capacitor to this pin, it is possible to vary both the IF
stage AC gain, and the IF stage quiescent current. However,
there is a limt to the amount of gain increase that is possible,
since there is always some package and bond wire
inductance back to the die. Furthermore, although some
additional IP3 performance may be gained by increasing the
quiescent current, in practice it makes no sense to increase
G
G
G
I
O
L
I
G
L
V
R
I
NETWORK
ANALYZER
PORT 1
MEASURE S21
LO IN
VDD
COAXIAL
PROBE
Vdd
PORT 2
LO Tuning
Inductor
Figure 5: LO Tuning Test Setup
(Note- For Clarity, Components Unrelated to LO are Not Shown)
Idd beyond that which provides maximuminput intercept. At
some point IP3 is limted by the mxer FET, and no further
increase in input intercept can be obtained by adjusting the IF
stage.
There are two GIC schemes that are recommended for the
TQ5M34 (Figure 6.). The first uses a small resistor (1.0 to 10
ohms) in series with a bypass capacitor to set the AC gain.
The IF stage current is then set by the larger resistor (10 to
100 ohms) that connects directly fromthe GIC pin to ground.
The small degeneration resistor lowers the IF stage gain, so
this method is preferable for gains less than 7 or 8dB.
The second scheme, which is recommended for maximum
gain, uses a resistor in parallel with capacitor. The resistor
sets the DC current, while the capacitor bypasses it at the IF
frequency. For highest gain, place the capacitor as close to
Pin 7 as possible. Try to avoid capacitors which are self-
resonant at the IF frequency.
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