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參數資料
| 型號： | TRIMEDIA_TM-1100 |
| 英文描述： | Programmable Media Processor |
| 中文描述： | 可編程的媒體處理器 |
| 文件頁數： | 2/8頁 |
| 文件大小： | 289K |
| 代理商： | TRIMEDIA_TM-1100 |
PROGRAMMABLE VLIW CPU
The TM-1100 delivers top performance through an elegant imple-
mentation of a very-long instruction word (VLIW) architecture.
Key to the TriMedia processor’s VLIW implementation, parallelism is
optimized at compile time by the TriMedia compilation system. No
specialized scheduling hardware is required to parallelize code during
execution. Hardware saved by eliminating complex scheduling logic
reduces cost and allows the integration of multimedia features that
enhance the power of the CPU in multimedia applications.
The TM-1100 processor’s powerful DSP-like, 32-bit CPU achieves
fine-grain parallelism by simultaneously targeting five of its 27
pipelined functional units within one clock cycle. Most common
operations have their results available in one clock cycle; more
complex operations have multicycle latencies.
Functional units can access 128 fully general-purpose, 32-bit registers
during execution. Since registers are not separated into banks, any
operation can use any register for any operand. Both big and little
endian byte ordering are supported.
The TriMedia TM-1100 CPU also provides special support for
instruction and data breakpoints, useful in debugging and program
development.
POWERFUL,DSP-LIKE,C-CALLABLE MULTIMEDIA OPS
In addition to traditional microprocessor operations and a full
complement of 32-bit, IEEE-compliant, floating point operations,
the TM-1100 instruction set includes multimedia and DSP operations
that accelerate the performance of multimedia applications. Such mul-
timedia operations can replace up to 11 traditional microprocessor
operations. When incorporated into application source code, they
dramatically improve performance and amplify the efficiency of the
TM-1100’s parallel architecture.
Multimedia operations are invoked with familiar function-call syntax
consistent with the C programming language. They are automatically
scheduled to take full advantage of the TriMedia processor’s highly
parallel VLIW implementation. As with all other operations generated
by the TriMedia VLIW compilation system, the scheduler takes care of
register allocation, operation packing, and flow analysis.
The TM-1100 processor enhances the multimedia operation set
available for the TM-1000 with 6 additional operations that improve
efficiency of MPEG-2 9-bit precise decoding, support video
de-interlacing (median filtering), and more.
MEMORY SYSTEM OVERVIEW
To reap the full benefit of the TM-1100 processor’s CPU and pro-
cessing units, its memory hierarchy must read and write data (and
instructions) fast enough to keep these units busy. Thus to meet the
A single-chip
multimedia
engine
Powered by a low-cost,
133-MHz, C-programmable CPU,
the TriMedia TM-1100 strikes a
perfect compromise between
cost and performance.
S D R A M
MAIN MEMORY
INTERFACE
I
2
C INTERFACE
AUDIO OUT
AUDIO IN
SYNCHRONOUS
SERIAL INTERFACE
TIMERS
ENHANCED VIDEO OUT
VLIW CPU
INSTR.
CACHE
DATA
CACHE
IMAGE
COPROCESSOR
PCI
/
XIO INTERFACE
VIDEO IN
VLD COPROCESSOR
TO
PCI
/
XIO
BUS
INTERNAL BUS (DATA HIGHWAY)
TM-1100 ARCHITECTURE
On a single chip, the TM-1100 incorporates a powerful CPU and
peripherals to accelerate processing of audio, video, graphics, and
communications data.
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| TRIMODS1537 | LCD 16X2 |
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相關代理商/技術參數 |
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| TRIMMING-POTENTIOMETER | 制造商:KINGTRONICS 制造商全稱:KINGTRONICS 功能描述:SGS Test Report |
| TRIMODS1531 | 制造商:TRIDENT 功能描述:LCD MODULE ALPHANUMERIC 16X1 |
| TRIMODS1531 | 制造商:TRIDENT 功能描述:LCD MODULE A/N 16X1 |
| TRIMODS1533 | 制造商:Trident Microsystems Inc 功能描述:LCD MODULE ALPHANUMERIC 16X1 |
| TRIMODS1533 | 制造商:Trident Microsystems Inc 功能描述:LCD MODULE A/N 16X1 |
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