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參數(shù)資料
型號(hào): TS8308500CGL
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, CBGA68
封裝: 11 X 11 MM, 1.27MM PITCH, CERAMIC, BGA-68
文件頁數(shù): 41/50頁
文件大小: 491K
代理商: TS8308500CGL
46
TS8308500
2193A–BDC–04/03
Definitions
Definition of Terms
(BER) Bit Error Rate
Probability to exceed a specified error threshold for a sample. An error code is a code that dif-
fers by more than ±4 LSB from the correct code.
(BW) Full-Power Input
Bandwidth
(DG) Differential Gain
Analog input frequency at which the fundamental component in the digitally reconstructed out-
put has fallen by 3 dB with respect to its low frequency value (determined by FFT analysis) for
input at full-scale.
The peak gain variation (in percent) at five different DC levels for an AC signal of 20% Full-
Scale peak to peak amplitude. F
IN = 5 MHz (TBC).
(DNL) Differential Non-
Linearity
The Differential Non-Linearity for an output code (i) is the difference between the measured
step size of code (i) and the ideal LSB step size. DNL (i) is expressed in LSBs. DNL is the
maximum value of all DNL (i). DNL error specification of less than 1 LSB guarantees that there
are no missing output codes and that the transfer function is monotonic.
(DP) Differential Phase
Peak Phase variation (in degrees) at five different DC levels for an AC signal of 20% Full-
Scale peak to peak amplitude. FIN = 5 MHz (TBC).
(ENOB) Effective
Number of Bits
Where A is the actual input amplitude and V is the full-scale range of the ADC under test.
(IMD) InterModulation
Distortion
The two tones intermodulation distortion (IMD) rejection is the ratio of either input tone to the
worst third order intermodulation products. The input tones levels are at -7 dB full-scale.
(INL) Integral Non-
Linearity
The Integral Non-Linearity for an output code (i) is the difference between the measured input
voltage at which the transition occurs and the ideal value of this transition.
INL (i) is expressed in LSBs, and is the maximum value of all |INL (i)|.
(JITTER) Aperture
Uncertainty
Sample to sample variation in aperture delay. The voltage error due to jitter depends on the
slew rate of the signal at the sampling point.
(NPR) Noise Power
Ratio
The NPR is measured to characterize the ADC performance in response to broad bandwidth
signals. When using a notch-filtered broadband white-noise generator as the input to the ADC
under test, the Noise Power Ratio is defined as the ratio of the average out-of-notch to the
average in-notch power spectral density magnitudes for the FFT spectrum of the ADC output
sample test.
(NRZ) Non-Return to
Zero
When the input signal is larger than the upper bound of the ADC input range, the output code
is identical to the maximum code and the Out of Range bit is set to logic one. When the input
signal is smaller than the lower bound of the ADC input range, the output code is identical to
the minimum code, and the Out of Range bit is set to logic one. (It is assumed that the input
signal amplitude remains within the absolute maximum ratings).
(ORT) Overvoltage
Recovery Time
Time to recover 0.2% accuracy at the output, after a 150% full-scale step applied on the input
is reduced to midscale.
SINAD - 1.76 + 20 log (A/V/2)
6.02
ENOB =
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