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參數資料
型號: TS8388BVGL
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA68
封裝: 1.27 MM PITCH, CERAMIC, BGA-68
文件頁數: 32/62頁
文件大小: 1267K
代理商: TS8388BVGL
38
0860E–BDC–05/07
TS8388B
e2v semiconductors SAS 2007
The TS8388B has been designed for reducing the probability of occurrence of such errors to approxi-
mately 10
-13 (targeted for the TS8388B at 1 Gsps).
A standard technique for reducing the amplitude of such errors down to ± 1 lsb consists of outputting the
digital data in Gray code format. Though the TS8388B has been designed for featuring a Bit Error Rate
of 10
-13 with a binary output format, it is possible for the user to select between the Binary or Gray output
data format, in order to reduce the amplitude of such errors when occurring, by storing Gray output
codes.
Digital data format selection:
Binary output format if GORB is floating or V
CC
Gray output format if GORB is connected to ground (0V)
8.9
Diode Pin 49
One single pin is used for both DRRB input command and die junction monitoring. The pin denomination
is DRRB/DIOD. Temperature monitoring and Data Ready control by DRRB is not possible
simultaneously.
Reset input command).
The operating die junction temperature must be kept below 145
°C, therefore an adequate cooling sys-
tem has to be set up. The diode mounted transistor measured Vbe value vs. junction temperature is
given below.
Figure 8-12. Diode Pin 49
600
640
680
720
760
800
840
880
920
960
1000
-55
-35
-15
5
25
45
65
85
105
125
VBE
(mV)
Junction temperature (
°C)
相關PDF資料
PDF描述
TS8388BMFSB/T 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BVFS 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BMF 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BCFS 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BCF 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
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